74LS47 Pinout: BCD-to-7-Segment Decoder/Driver — Pin Diagram, Function Table, and Circuit Notes

74LS47 Pinout: BCD-to-7-Segment Decoder/Driver — Pin Diagram, Function Table, and Circuit Notes — interactive diagram. Open it in the editor to customise components and wiring.

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The 74LS47 is a 16-pin TTL BCD-to-7-segment decoder/driver IC with active-low open-collector outputs designed to directly drive common-anode 7-segment LED displays, decoding 4-bit binary-coded decimal inputs (0–15) into the corresponding segment drive pattern.

The 74LS47 is a member of the 74LS (Low-Power Schottky TTL) logic family. Its primary function is to accept a 4-bit BCD (Binary Coded Decimal) input and produce the correct pattern of active-low signals on its seven segment outputs (a through g) to illuminate the appropriate segments on a common-anode 7-segment LED display.

The IC is a 16-pin dual-in-line package (DIP-16). The pin assignments are: Pin 1 (B), Pin 2 (C), Pin 6 (D), Pin 7 (A) — the four BCD input bits (note the non-sequential ordering: A is the LSB, D is the MSB). Pin 3 (LT, Lamp Test, active low): pulling this pin low illuminates all seven segments simultaneously, used for testing display integrity. Pin 4 (BI/RBO, Blanking Input / Ripple Blanking Output, active low, open-collector, wired-AND): a dual-function pin that, when pulled low externally (BI), blanks all outputs regardless of BCD input; when configured as RBO, it outputs a low signal when both the BCD input is zero AND the RBI input is active, enabling leading-zero suppression in multi-digit displays. Pin 5 (RBI, Ripple Blanking Input, active low): when low and the BCD input is 0000, the display is blanked and pin 4 (RBO) is driven low to cascade blanking to the next digit. Pins 9–15 are the segment outputs a through g respectively. Pin 8 is GND and Pin 16 is VCC (+5 V).

The outputs are open-collector (active low). This means each output is pulled low (connected to ground through an internal transistor) when the corresponding segment should illuminate. For a common-anode display, the common anode is connected to VCC (or to VCC through a supply-side current-limiting resistor), and a current-limiting resistor (typically 150–470 Ω depending on LED forward voltage and desired brightness) is placed in series with each segment output pin to the LED segment cathode. Never connect the output pins directly to VCC — the open-collector outputs cannot source current, they only sink it.

The 74LS47 is rated for output sink current of up to 40 mA per output, making it suitable for direct LED drive. However, the sum of all active segments should not cause the total device power dissipation to exceed 500 mW. For BCD inputs 10–15 (which are not valid BCD digits), the 74LS47 outputs non-standard segment patterns (not standard characters) — these are fixed by the internal logic and cannot be changed.

For CMOS-level logic systems, the 74HCT47 (HCT family, 5 V tolerant CMOS with TTL-compatible inputs) or CD4511 (CMOS, active-high outputs, common-cathode) may be more appropriate choices depending on supply voltage and output configuration requirements.

How to wire 74ls47 pinout

Identify the correct display type: confirm common-anode before using the 74LS47 Test the display before connecting: apply +5 V to the common pin and connect a 330 Ω resistor from ground to each segment pin in turn — if segments illuminate, it is a common-anode display and compatible with the 74LS47. If the display is common-cathode (common pin to ground, segment pins pulled high to illuminate), use the 74LS48 or CD4511 instead — connecting a 74LS47 to a common-cathode display produces no display output because the open-collector outputs cannot source current.
Connect power supply: VCC (pin 16) and GND (pin 8) Connect pin 16 to a regulated +5 V supply (within the 74LS47 operating range of 4.75–5.25 V). Connect pin 8 to the supply ground (0 V). Place a 100 nF ceramic decoupling capacitor as close as physically possible to the VCC and GND pins on the PCB — this suppresses TTL switching noise that can cause false output glitches. Omitting the decoupling capacitor is a common reason for erratic display behaviour in prototypes.
Connect control pins LT, RBI, and BI/RBO For basic operation without lamp test, ripple blanking, or blanking: connect pin 3 (LT) to VCC; connect pin 5 (RBI) to VCC; leave pin 4 (BI/RBO) unconnected (it has a pull-up function for the RBO mode). If not using ripple blanking, tie LT and RBI high and leave BI/RBO open. If blanking input is required, connect BI/RBO to the blanking control signal (active low).
Connect the BCD inputs (pins A, B, C, D) to the logic source Connect pin 7 (A — LSB), pin 1 (B), pin 2 (C), pin 6 (D — MSB) to the 4-bit BCD outputs of your logic source (microcontroller GPIO, BCD counter IC, or DIP switches with pull-down resistors). Note the non-sequential pin order. For a BCD counter such as the 74HC4518, verify which output is the MSB before connecting — incorrect bit ordering produces wrong digit decoding.
Connect current-limiting resistors to the segment outputs Connect a resistor of the calculated value (typically 150–470 Ω) in series with each of the seven segment output pins (pins 9–15 for segments a–g, pin 13 for segment 'g', checking the datasheet segment-to-pin mapping). Connect the free end of each resistor to the corresponding segment cathode pin of the common-anode display. The segment anode of the display connects internally via the common anode pin to VCC.
Connect the display common anode Connect the common anode pin(s) of the 7-segment display to VCC (+5 V). For multi-digit displays with multiplexed drive, the common anode is switched by an external PNP transistor or P-channel MOSFET; in that configuration, the 74LS47 outputs are shared across digits and only one digit is enabled at a time. For a single static display, a direct connection to VCC is correct.
Apply power and verify BCD input against expected display output Apply a known BCD input (for example, 0001 = binary 1) and verify the display shows the correct digit. Systematically step through inputs 0000 (0) through 1001 (9) and verify each digit. Check that unused input states (1010–1111) produce the expected non-standard patterns and that the display does not show any of these during normal operation.

Specifications

IC family and supply voltage	74LS (Low-Power Schottky TTL), VCC = 4.75–5.25 V
Package	16-pin DIP (Dual Inline Package), 2.54 mm pin pitch
Output type	Active-low, open-collector — for COMMON-ANODE displays only
Maximum output sink current (per pin)	40 mA
Input logic levels (TTL)	Logic 0: Vin ≤ 0.8 V; Logic 1: Vin ≥ 2.0 V
Propagation delay (BCD input to segment output)	Typically 15–50 ns
Operating temperature range	0 °C to +70 °C (commercial grade)
BCD input range (valid decode)	0000 (0) through 1001 (9); inputs 1010–1111 produce non-standard segment patterns

Safety warnings

The 74LS47 and associated circuit operate at 5 V DC logic levels — this is a low-voltage circuit presenting no significant electrical shock hazard under normal conditions. However, do not exceed the absolute maximum ratings: VCC must not exceed 7 V; input voltages must not exceed VCC + 0.5 V; output sink current must not exceed 40 mA per output or 100 mA total device dissipation limit.
Never connect the segment output pins of the 74LS47 directly to the VCC supply rail or to any positive voltage without the current-limiting resistors in series. The open-collector outputs cannot source current — a direct connection to VCC through the display with no resistor will short VCC through the LED and resistanceless circuit, destroying the LED segments and potentially the IC output transistors.
When handling ICs and LED displays, observe standard ESD (electrostatic discharge) precautions — use a grounded anti-static wrist strap and work on an anti-static mat. Although the 74LS47 is less sensitive than CMOS parts, repeated ESD stress can cause latent damage that manifests as intermittent output failures later in service.
If using the 74LS47 in an educational setting with mains-powered lab equipment, ensure all mains-connected power supplies are properly earthed and have appropriate overcurrent protection. The 5 V supply to the logic circuit should be derived from a regulated, isolated power supply — not directly from a mains rectifier without regulation.

Tools needed

Digital multimeter (voltage verification and continuity testing)
Soldering iron and solder (for PCB assembly; 60/40 or SAC305 lead-free solder)
Breadboard or PCB (for prototyping)
Oscilloscope (for verifying clean BCD input signals and output switching — optional but useful)
IC extraction tool or fine flat-blade screwdriver (for removing DIP IC from socket without bending pins)
Magnifying glass or USB microscope (for inspecting DIP IC pin soldering)

Common mistakes

Connecting the 74LS47 to a common-cathode display instead of a common-anode display — the active-low (sinking) outputs cannot drive a common-cathode display, producing no illumination; a very common mistake when selecting displays for this IC.
Omitting current-limiting resistors on the segment outputs — without resistors, the segment current is limited only by the LED forward voltage and the output transistor, causing excessive current that destroys segments within seconds at power-up.
Confusing the BCD input pin assignments — connecting A (LSB, pin 7) to the MSB output of the BCD source, or misordering B, C, D inputs, results in incorrect digit decoding (e.g., input 3 shows digit 6, or similar transposition errors).
Leaving the LT (lamp test, pin 3) pin floating — while internal pull-up exists, an undriven LT pin in a noisy environment can float to a low logic level and trigger all segments on, making the display appear to always show an 8 regardless of BCD input.
Using the 74LS47 at supply voltages above 5.25 V — the absolute maximum VCC for 74LS devices is 7 V, but reliability degrades above 5.25 V; connecting to a 5 V rail that is actually regulated to 5.5 V (a common issue with some power supplies) can cause erratic behaviour.

Troubleshooting

Display shows incorrect digit for a known BCD input: Cause: BCD input bits connected in incorrect order — A (LSB) and D (MSB) are transposed, or B and C are swapped; or a cold solder joint on one input pin Fix: With a multimeter, measure each BCD input pin (7, 1, 2, 6 for A, B, C, D) and verify the correct logic level for the applied BCD value. Compare pin assignment against the 74LS47 datasheet carefully — the non-sequential pin order is a frequent source of wiring errors. Reflow any suspected cold solder joints.
All 7 segments illuminate constantly regardless of BCD input: Cause: LT (lamp test) pin 3 is being held at logic 0 (or floating in a low-noise environment and capacitively coupling to logic 0) Fix: Connect a 10 kΩ pull-up resistor from LT (pin 3) to VCC, or directly wire pin 3 to VCC if lamp test is not required. Verify the LT pin is not shorted to ground by checking continuity from pin 3 to GND.
One or more segments do not illuminate for any BCD input: Cause: Failed segment LED in the display, open-circuit current-limiting resistor, failed 74LS47 output stage on that segment pin, or a missing solder joint on the segment output pin or resistor Fix: Disconnect the 74LS47 and apply LT (pull pin 3 to GND) — all segments should illuminate. If a segment still does not light, the fault is in the display or resistor. If the segment lights during LT but not during normal decode, the IC output for that segment has failed — replace the 74LS47.

Frequently asked questions

Is the 74LS47 for common-anode or common-cathode 7-segment displays?

The 74LS47 is designed for COMMON-ANODE displays. Its outputs are active-low (open-collector) — they sink current when a segment should be illuminated. The common anode of the display connects to VCC (through a current-limiting resistor if desired). For COMMON-CATHODE displays, use the 74LS48 (active-high outputs, internal pull-ups) or the CD4511 instead.

What resistor value should I use between the 74LS47 output and each LED segment?

With a 5 V supply and a typical LED forward voltage of 1.8–2.2 V, a resistor of 150–330 Ω gives a segment current of approximately 8–20 mA — within the 40 mA maximum sink current per output. For lower brightness or power saving, use 470 Ω (about 6 mA). Calculate as: R = (VCC − Vf) / If. Never omit the resistors — direct connection to 5 V will destroy the LED and may damage the IC output.

What does the Lamp Test (LT) pin do on the 74LS47?

When pin 3 (LT, active low) is pulled to logic 0 (ground), all seven segment outputs (a–g) are activated simultaneously, illuminating all segments regardless of the BCD input. This allows a display test to verify that no segment LEDs have failed. During normal operation, LT must be held at logic 1 (VCC or left unconnected — internal pull-up present, though tying high is better practice).

How do I suppress leading zeros in a multi-digit display using the 74LS47?

Use the RBI (Ripple Blanking Input, pin 5) and RBO (Ripple Blanking Output, pin 4) cascade connection. For a 4-digit display, connect RBI of the most-significant digit to ground (enabling zero suppression). Connect the RBO of each digit (pin 4) to the RBI of the next less-significant digit. When the MS digit BCD input is 0000, it blanks and cascades the blank signal to the next digit — continuing until a non-zero digit is reached.

What happens when the BCD input exceeds 9 (inputs 10–15) on the 74LS47?

For BCD inputs 1010 (10) through 1111 (15), the 74LS47 outputs non-standard segment patterns — some appear as meaningless partial characters or blanks. These are defined by the internal decode logic and are not useful display characters. In a proper BCD application, the input should never exceed 9 unless non-numeric indicators are intentionally designed using these states.

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