Ladder Diagram Examples with Solutions: 12 Fully Worked PLC Problems
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This page provides 12 fully worked ladder diagram examples — each with a problem statement, I/O allocation table, complete annotated ladder solution, and rung-by-rung explanation. Unlike other resources that list problems without diagrams, every example here is solved in full. The examples progress from simple AND/OR logic through seal-in circuits, timers, counters, comparison instructions, and a complete traffic light sequence — covering the problems most commonly encountered in PLC training courses, technical exams, and real industrial commissioning.
## How to Solve Ladder Diagram Problems: A Systematic Approach
Every ladder diagram problem should be approached with the same four-step methodology used by experienced PLC engineers:
**Step 1 — Define outputs first.** List every output: motors, valves, alarms, lights. Give each a tag name and PLC address.
**Step 2 — Define the conditions for each output.** For each output, write: 'This output is ON when [conditions] AND [conditions], UNLESS [interlocks].'
**Step 3 — Build the I/O allocation table.** List every input and output with its address, tag name, signal type (NO/NC at hardware level), and description.
**Step 4 — Write rungs from your conditions.** Conditions joined by AND become series contacts. Conditions joined by OR become parallel branches. Safety interlocks and stop conditions become NC contacts (XIO or XIC on NC-wired inputs) in series.
This methodology prevents the most common mistake — writing code before thinking about the logic — and ensures the resulting program is safe, complete, and documentable.
## Example 1: AND Logic — Two-Button Lamp Control
**Problem:** A safety lamp must only illuminate when BOTH pushbutton PB1 (NO) AND pushbutton PB2 (NO) are pressed simultaneously.
**I/O Table:** I:0/0 = PB1 (NO pushbutton), I:0/1 = PB2 (NO pushbutton), O:0/0 = Lamp.
**Ladder Solution:** Rung 1: XIC I:0/0 — XIC I:0/1 — OTE O:0/0.
**Truth table:** PB1=0, PB2=0 → Lamp=0. PB1=1, PB2=0 → Lamp=0. PB1=0, PB2=1 → Lamp=0. PB1=1, PB2=1 → Lamp=1.
**Explanation:** The two XIC contacts in series implement AND logic. Current flows to the OTE only when both contacts pass — both bits must be 1. This pattern is used for two-hand safety controls, confirmation start sequences, and guard-verified enables.
## Example 2: OR Logic — Dual-Sensor Alarm
**Problem:** An alarm siren must activate if EITHER a high-temperature sensor (TS1, closes on high temp) OR a high-pressure sensor (PS1, closes on high pressure) activates.
**I/O Table:** I:0/2 = TS1 (NO closes on alarm), I:0/3 = PS1 (NO closes on alarm), O:0/1 = Alarm Siren.
**Ladder Solution:** Rung 1: [XIC I:0/2 in parallel with XIC I:0/3] — OTE O:0/1.
**Explanation:** The two XIC contacts on parallel branches implement OR logic. Either branch being TRUE (either sensor active) completes the path to the alarm coil. This pattern is used for redundant detection, any-sensor-triggers-alarm circuits, and multi-input process alarms.
## Example 3: Start/Stop Motor with Seal-In Contact
**Problem:** A conveyor motor must start when a momentary Start PB is pressed, continue running after the button is released, and stop when a momentary Stop PB is pressed. An overload relay (OL) contact must cut the motor if it trips.
**I/O Table:** I:0/0 = Start (NO momentary PB), I:0/1 = Stop (NC momentary PB, wired NC to input → bit=1 at rest), I:0/2 = OL Contact (NC thermal OL, wired NC → bit=1 when healthy), O:0/0 = Motor Contactor KM1.
**Ladder Solution:** Rung 1: [XIC I:0/0 in parallel with XIC O:0/0] — XIC I:0/1 — XIC I:0/2 — OTE O:0/0.
**Explanation, rung element by element:** XIC I:0/0 passes when Start is pressed (bit=1). XIC O:0/0 in parallel is the seal-in: once the motor energises and O:0/0=1, this contact closes and maintains the rung TRUE after Start is released. XIC I:0/1 passes while Stop is not pressed (NC wired → bit=1 at rest; pressing Stop opens field circuit → bit=0 → XIC opens → rung FALSE → motor stops). XIC I:0/2 passes while OL is healthy (bit=1). If OL trips, bit→0, XIC opens, motor stops. OTE O:0/0 drives the physical contactor coil.
**Fail-safe verification:** Broken Stop wire → I:0/1 bit = 0 → XIC I:0/1 opens → motor cannot start or immediately stops. Broken OL wire → I:0/2 bit = 0 → XIC I:0/2 opens → motor stops. All wire failures produce a safe (stopped) state.
## Example 4: Single Push-Button Toggle (Flip-Flop)
**Problem:** A single momentary pushbutton should toggle a lamp ON on the first press and OFF on the second press (flip-flop behaviour).
**I/O Table:** I:0/3 = Toggle PB (NO), O:0/2 = Lamp.
**Ladder Solution:** Rung 1: XIC I:0/3 — ONS B3:0/10 — XIO O:0/2 — OTL O:0/2. (Comment: Latch ON when button pressed and lamp currently OFF) Rung 2: XIC I:0/3 — ONS B3:0/11 — XIC O:0/2 — OTU O:0/2. (Comment: Unlatch when button pressed and lamp currently ON)
**Explanation:** The ONS (one-shot) instruction on Rung 1 fires for exactly one scan when the button transitions from 0 to 1, preventing repeated toggling during the button's hold time. On the first press: Lamp is OFF (O:0/2=0), XIO O:0/2 passes, OTL latches lamp ON. Second press: Lamp is ON (O:0/2=1), XIC O:0/2 passes on Rung 2, OTU unlatches lamp OFF. Note: B3:0/10 and B3:0/11 are separate ONS storage bits — each ONS instruction requires its own storage bit.
## Example 5: Forward/Reverse Motor Interlock
**Problem:** A motor can run in either forward or reverse direction, selected by separate pushbuttons. Forward and Reverse contactors must NEVER energise simultaneously. A common Stop button stops both directions.
**I/O Table:** I:0/0 = Fwd_Start (NO), I:0/1 = Rev_Start (NO), I:0/2 = Stop (NC → bit=1 at rest), O:0/1 = Fwd_Contactor, O:0/2 = Rev_Contactor; Internal: B3:0/0 = Fwd_Flag, B3:0/1 = Rev_Flag.
**Ladder Solution:** Rung 1 (Forward): [XIC I:0/0 || XIC B3:0/0] — XIC I:0/2 — XIO B3:0/1 — OTE B3:0/0 — OTE O:0/1. Rung 2 (Reverse): [XIC I:0/1 || XIC B3:0/1] — XIC I:0/2 — XIO B3:0/0 — OTE B3:0/1 — OTE O:0/2.
**Explanation:** The seal-in contact (XIC B3:0/0 in Rung 1) holds the forward direction after Fwd_Start is released. The critical interlock is XIO B3:0/1 on Rung 1: if Reverse is running (B3:0/1=1), XIO B3:0/1 is FALSE, blocking the Forward rung entirely — Forward cannot start while Reverse is active. Symmetrically, XIO B3:0/0 on Rung 2 blocks Reverse while Forward is running. To change direction, operator must press Stop first (XIC I:0/2 opens, both rungs go FALSE, both outputs de-energise), then press the desired direction. Add mechanical interlocks on the physical contactors as a hardware backup.
## Example 6: On-Delay Timer (TON) — Pump Start Delay
**Problem:** A pump must start 10 seconds after a float switch indicates high level, to confirm the reading is genuine before starting.
**I/O Table:** I:0/5 = Level_High (float switch, NO closes when high), O:0/3 = Pump; T4:0 = Pump_Delay (TON, PRE=10000 ms).
**Ladder Solution:** Rung 1: XIC I:0/5 — TON T4:0 PRE=10000 BASE=0.001. Rung 2: XIC T4:0/DN — OTE O:0/3.
**Explanation:** While Level_High is TRUE (I:0/5=1), T4:0 accumulates time — 1 ms per scan at BASE=0.001 (1 ms). After 10,000 counts (10 seconds), T4:0/DN sets to 1. Rung 2 then energises the Pump. If Level_High goes FALSE before 10 seconds, T4:0.ACC resets to 0 — the pump never starts on a momentary float bounce. T4:0/TT (timing bit) is 1 during the count; T4:0/EN is 1 while rung 1 is TRUE.
## Example 7: Off-Delay Timer (TOF) — Cooling Fan Run-On
**Problem:** A cooling fan must continue running for 30 seconds after the main motor stops, to extract residual heat from the motor enclosure.
**I/O Table:** O:0/0 = Motor (from Example 3), O:0/4 = Cooling_Fan; T4:1 = Fan_RunOn (TOF, PRE=30000 ms).
**Ladder Solution:** Rung 1: XIC O:0/0 — TOF T4:1 PRE=30000 BASE=0.001. Rung 2: XIC T4:1/DN — OTE O:0/4.
**Explanation:** While Motor (O:0/0) is TRUE, TOF T4:1/DN is immediately 1 (the TOF Done bit is ON while the enable rung is TRUE). Rung 2 energises the Fan. When the motor stops (O:0/0=0), the TOF rung goes FALSE and T4:1 begins counting. For 30 seconds, T4:1/DN stays 1 — the Fan remains ON. After 30 seconds, T4:1/DN clears to 0 and the Fan de-energises.
## Example 8: Retentive Timer (RTO) — Machine Run-Hours Meter
**Problem:** Track total machine run hours for maintenance scheduling. The accumulated time must survive a power cycle.
**I/O Table:** O:0/0 = Motor_Run, N7:0 = RunHours_Integer; T4:2 = RunHours_RTO (RTO, PRE=3600000 ms = 1 hour).
**Ladder Solution:** Rung 1: XIC O:0/0 — RTO T4:2 PRE=3600000. Rung 2: XIC T4:2/DN — ADD T4:2.ACC, N7:0, N7:0. (Add accumulated ms to running total — note: simplified; real implementation uses MOV and math) Rung 3 (Reset for maintenance): XIC MaintenanceAck (B3:0/20) — RES T4:2.
**Explanation:** Unlike TON, the RTO retains its accumulated value (T4:2.ACC) when the enable rung goes FALSE (motor stops). The ACC continues accumulating across multiple start/stop cycles. When ACC reaches PRE (1 hour = 3,600,000 ms), the DN bit sets — triggering a maintenance alarm or incrementing an hours counter. The RES instruction (Rung 3) clears ACC only when a maintenance technician acknowledges the service interval.
## Example 9: Counter (CTU) — Batch Parts Counter with Reset
**Problem:** Count 100 parts on a conveyor using a photosensor. Stop the conveyor when 100 parts have passed. Reset the count when the operator starts a new batch.
**I/O Table:** I:0/7 = PartSensor (photosensor, NO — fires each part), I:0/6 = BatchStart (NO PB), O:0/3 = Conveyor; C5:0 = PartCount (CTU, PRE=100).
**Ladder Solution:** Rung 1: XIC I:0/7 — CTU C5:0 PRE=100. (Comment: Increment count on each part) Rung 2: XIO C5:0/DN — OTE O:0/3. (Comment: Run conveyor until 100 parts counted) Rung 3: XIC I:0/6 — RES C5:0. (Comment: Reset counter on batch start)
**Explanation:** Each FALSE-to-TRUE transition of PartSensor (I:0/7) increments C5:0.ACC by 1. When ACC reaches 100, C5:0/DN sets to 1. Rung 2's XIO C5:0/DN opens, de-energising the Conveyor output. The conveyor stops. The count holds until the operator presses BatchStart (I:0/6), which triggers the RES instruction, clearing C5:0.ACC to 0 and resetting C5:0/DN to 0 — the conveyor starts again.
## Example 10: Comparison Instruction — Temperature ON/OFF Controller
**Problem:** Turn on a chiller when temperature (analog input N7:0, scaled 0–1000 = 0.0–100.0°C) exceeds 75°C. Turn it off when temperature drops below 70°C (hysteresis to prevent rapid cycling).
**I/O Table:** N7:0 = Temp_AI (0–1000 integer = 0–100°C), O:0/5 = Chiller; B3:0/25 = Chiller_Latch.
**Ladder Solution:** Rung 1: GEQ Source_A=N7:0, Source_B=750 — OTL B3:0/25. (Comment: Latch chiller ON when temp ≥ 75°C) Rung 2: LEQ Source_A=N7:0, Source_B=700 — OTU B3:0/25. (Comment: Unlatch chiller when temp ≤ 70°C) Rung 3: XIC B3:0/25 — OTE O:0/5. (Comment: Chiller output from latch flag)
**Explanation:** When temperature reaches 750 (75.0°C), the GEQ instruction on Rung 1 evaluates TRUE and OTL sets B3:0/25. The chiller turns ON via Rung 3. Even as temperature drops, B3:0/25 stays latched. Only when temperature drops to 700 (70.0°C) does the LEQ on Rung 2 evaluate TRUE and OTU clear B3:0/25, turning the chiller off. The 5°C hysteresis band prevents the chiller from cycling on and off rapidly around the setpoint.
## Example 11: Tank Level Control with Two Float Switches
**Problem:** A tank has two float switches: LS_LO (low level — NO closes when liquid drops to low point) and LS_HI (high level — NO closes when liquid reaches high point). A fill pump should run when level is low, and stop when level is high.
**I/O Table:** I:0/8 = LS_LO (float switch, bit=1 when level at low → pump needed), I:0/9 = LS_HI (float switch, bit=1 when level at high → stop pump), O:0/6 = Fill_Pump.
**Ladder Solution:** Rung 1: [XIC I:0/8 in parallel with XIC O:0/6] — XIO I:0/9 — OTE O:0/6.
**Explanation:** XIC I:0/8 starts the pump when low-level float activates. XIC O:0/6 (seal-in) keeps it running after LS_LO deactivates as liquid level rises above the low float. XIO I:0/9 blocks the rung as soon as the high-level float activates (I:0/9=1 → XIO opens → pump stops). When the liquid drains below the low float again (I:0/8=1), the cycle repeats. This is the classic two-float-switch hysteresis controller — the gap between the two float levels is the hysteresis band.
## Example 12: Traffic Light Sequence with Chained TON Timers
**Problem:** Control a single-direction traffic light: Green for 30 seconds, Yellow for 5 seconds, Red for 35 seconds, then cycle repeats.
**I/O Table:** I:0/0 = Start (NO PB), O:0/0 = Green_Light, O:0/1 = Yellow_Light, O:0/2 = Red_Light; T4:5 = Green_Timer (TON, PRE=30000), T4:6 = Yellow_Timer (TON, PRE=5000), T4:7 = Red_Timer (TON, PRE=35000); B3:0/30 = Seq_Run.
**Ladder Solution:** Rung 1: [XIC I:0/0 || XIC B3:0/30] — XIO T4:7/DN — OTE B3:0/30. (Start/stop sequence run flag) Rung 2: XIC B3:0/30 — XIO T4:5/DN — OTE O:0/0 — TON T4:5 PRE=30000. (Green ON for 30s) Rung 3: XIC T4:5/DN — XIO T4:6/DN — OTE O:0/1 — TON T4:6 PRE=5000. (Yellow ON for 5s after green done) Rung 4: XIC T4:6/DN — XIO T4:7/DN — OTE O:0/2 — TON T4:7 PRE=35000. (Red ON for 35s after yellow done) Rung 5: XIC T4:7/DN — RES T4:5 — RES T4:6 — RES T4:7. (All timers reset when red completes → cycle restarts)
**Explanation:** Rung 1 starts the sequence and holds it running until T4:7/DN signals the red phase complete. Rung 2: Green runs while Seq_Run is TRUE AND Green timer has not yet done (XIO T4:5/DN). The TON accumulates time. After 30 seconds, T4:5/DN sets, Green rung becomes FALSE (XIO T4:5/DN opens), green light extinguishes and Green timer is latched done. Rung 3: Yellow starts when Green is done (XIC T4:5/DN) and runs for 5 seconds (T4:6 PRE=5000). Rung 4: Red starts when Yellow is done and runs for 35 seconds. Rung 5: When Red timer completes, all three timers are reset, clearing all DN bits — Rung 2 re-enables, Green starts again, the cycle repeats. Only one light is ON at any time because each light's enable condition requires the previous phase to be done and the current phase's timer to not yet be done.
Open any of these examples in circuitdiagrammaker's free online ladder diagram editor — modify the timer presets, add your own I/O addresses, and export the result as SVG or PDF for your coursework, exam prep, or project documentation.
How to wire ladder diagram examples with solutions
- Define the I/O allocation table before writing any rungs Every professional ladder program starts with a table: column 1 = PLC address (I:0/0, I0.0, etc.), column 2 = tag name (e.g. PB_Start_NO), column 3 = signal type (NO or NC at hardware level), column 4 = description (e.g. 'Green start pushbutton, panel-mounted'). This table catches design errors before they become wiring mistakes.
- Write the boolean expression in plain language first Before touching software, write each output's condition: 'Pump runs IF Level_High AND (Start pressed OR Pump already running) AND Stop not pressed AND No fault.' Map each clause to a contact type: AND = series, OR = parallel, NOT = XIO or XIC on NC-wired input.
- Build the seal-in pattern for all latching motor outputs Any momentary pushbutton that starts a motor or process needs a seal-in: place an XIC contact on the output bit in parallel with the Start XIC contact. Test by pressing and releasing Start — the output must stay ON. Test by pressing Stop — the output must de-energise.
- Add safety interlocks after the main logic is correct Add XIC contacts for all NC-wired safety devices (OL contacts, guard switches, E-stops) in series on every output rung that moves the machine. Test each interlock by forcing the safety input to 0 and confirming the associated output de-energises.
- Use timer chaining for multi-step sequences For timed sequences (traffic light, step-and-dwell cycles), chain TON timers: Timer 1 enable comes from a flag bit; Timer 2 enable comes from Timer 1 DN; Timer 3 from Timer 2 DN. Reset all timers at the end of the last step. Only one step is active at any point — verify by monitoring all timer EN bits simultaneously.
- Add a reset rung for every counter and retentive timer A counter without a reset rung is a design error — after the first production batch, the counter will immediately trip without counting. Every CTU and RTO must have a separate rung with a RES instruction on an appropriate reset condition (batch-start button, maintenance-acknowledge, cycle-reset).
- Simulate all fault modes before commissioning For each safety interlock contact, force the input bit to 0 (simulating a broken wire or tripped device) and verify the machine output de-energises. For each timer, force the enable rung FALSE mid-count and verify the TON resets. For counters, verify the RES rung clears ACC correctly.
- Document with rung comments and I/O descriptions Add a plain-English comment to every rung before declaring the program complete. Add a symbol description to every I/O address. These comments are the most valuable part of the program for the technician who will troubleshoot the machine at 2 AM three years after you wrote it.
Specifications
| -| |- (XIC) | Examine If Closed. NO contact. Passes when bit=1. |
|---|---|
| -|/|- (XIO) | Examine If Open. NC contact. Passes when bit=0. |
| -( )- (OTE) | Output Energize. Non-retentive. Bit=1 while rung TRUE. |
| -(L)- (OTL / SET) | Output Latch. Sets bit=1 retentively. Stays 1 until OTU clears it. |
| -(U)- (OTU / RESET) | Output Unlatch. Clears bit=0 when rung TRUE. |
| TON | Timer On Delay. DN bit sets when ACC≥PRE while rung continuously TRUE. ACC resets when rung FALSE. |
| TOF | Timer Off Delay. DN=1 immediately when rung TRUE. Starts timing on rung FALSE; DN=0 when ACC≥PRE. |
| RTO | Retentive Timer On. ACC holds when rung FALSE. Requires RES to clear. Used for total-hours accumulation. |
| CTU | Count Up. ACC increments on each FALSE→TRUE rung transition. DN=1 when ACC≥PRE. |
| CTD | Count Down. ACC decrements on each FALSE→TRUE transition. DN=1 when ACC≤0. |
| RES | Reset. Clears ACC to 0 and resets DN bit of a CTU, CTD, or RTO when rung TRUE. |
| ONS / OSR | One-Shot Rising. TRUE for exactly one scan on FALSE→TRUE input transition. Requires a dedicated storage bit. |
| GEQ | Greater Than or Equal. TRUE when Source A ≥ Source B. Used for analog setpoint compare. |
| LEQ | Less Than or Equal. TRUE when Source A ≤ Source B. Used for low-limit checks and hysteresis lower bound. |
| EQU | Equal. TRUE when Source A = Source B. Used for exact state matching. |
| I/O Allocation Table | Design document listing every PLC address, tag name, hardware signal type (NO/NC), and plain-language description. Required before writing any rungs. |
Safety warnings
- All NC-wired safety inputs (E-stop, guard switches, OL contacts) must be wired NC at the hardware terminal AND represented as XIC contacts in the ladder. This double-NC convention ensures that wire breaks produce safe states at both the hardware level and the software level.
- For Examples 3, 5, and any other motor control program: always add a physical overload relay (or electronic motor protection relay) with its NC contact wired to a PLC input. Do not rely solely on software current monitoring — hardware OL protection is required by IEC 60947-4.
- The traffic light example (Example 12) uses software-only interlocking. For real road infrastructure, a hardware-level dark (all-dark) or all-red fail-safe must be implemented that activates if the PLC stops scanning or loses power.
Tools needed
- Spreadsheet for I/O allocation table — Google Sheets or Microsoft Excel. Template: Address | Tag Name | Signal Type | Description | Safety Note.
- OpenPLC (free, open-source) — simulate all 12 examples before connecting to real hardware.
- circuitdiagrammaker.com — draw and export any example as SVG or PDF. No download required.
- Allen-Bradley Studio 5000 or Siemens TIA Portal — professional environments for deploying examples to real hardware.
- Digital multimeter and laptop with PLC communications cable — required for commissioning, verifying that physical I/O matches the I/O allocation table.
Common mistakes
- Skipping the I/O allocation table and writing rungs directly from memory — leading to incorrect contact types (XIC vs XIO) and missing safety inputs.
- Using a NO-wired Stop button at the hardware level — a broken wire leaves the machine unable to stop, violating IEC 60204-1.
- Forgetting the seal-in contact — the motor only runs while the Start button is held, not the continuous-run behaviour required.
- Missing the RES rung for counters — the counter reaches its preset during the first batch and never resets, stopping the conveyor immediately at batch start on all subsequent cycles.
- Placing interlock XIO contacts with the wrong address — referencing an input bit instead of the output flag bit. The interlock fires on the input state instead of the actual output state, potentially allowing simultaneous forward/reverse operation.
- Incorrect TON time base — entering PRE=10 expecting 10 seconds when the time base is 0.001 s (1 ms), giving a 10 ms delay instead.
Troubleshooting
- Seal-in circuit motor starts but does not hold after Start button released
- Cause: The seal-in XIC contact references the wrong bit (e.g., references the input bit I:0/0 instead of the output bit O:0/0), so when Start releases (I:0/0=0) the seal-in also opens. Fix: Verify the seal-in XIC contact address is the same as the OTE coil address on the same rung. The output's own bit must be used as the seal-in, not any input bit.
- Traffic light sequence gets stuck — one light stays on indefinitely
- Cause: One of the chained timers' enable rungs is not evaluating TRUE — the done bit from the previous phase may not be setting, preventing the next phase from starting. Fix: Monitor all three timer EN, TT, and DN bits simultaneously. Find the timer that is not accumulating. Verify its enable rung (XIC of previous-phase DN) is TRUE. If T4:5/DN is not setting, verify T4:5's enable rung and PRE value are correct.
- Counter stops conveyor after fewer parts than the preset
- Cause: The photosensor is generating multiple FALSE→TRUE transitions per physical part (sensor bounce or machine vibration causing multiple signal edges). The counter increments 2–5 times per part. Fix: Add an ONS (one-shot) instruction in series with the CTU enable contact. ONS limits the count to one increment per transition regardless of bounce duration. Alternatively, add an input filter delay in the PLC input configuration for that channel.
- Analog temperature controller (Example 10) cycles the chiller on/off rapidly
- Cause: The hysteresis band is too narrow or the OTL/OTU threshold values are set equal (no deadband), causing both comparison instructions to switch state almost simultaneously. Fix: Increase the gap between GEQ threshold and LEQ threshold. For a 0–1000 integer scale, a minimum deadband of 30–50 counts (3–5°C equivalent) prevents rapid cycling. Set GEQ at 750 and LEQ at 700 for a 5°C hysteresis band.
- Forward/reverse interlock fails during rapid direction changes
- Cause: Mechanical contactor dropout time (typically 20–50 ms) is slower than the PLC scan cycle. The PLC may see both contactors as de-energised for one scan and briefly energise both simultaneously during the direction change. Fix: Add a changeover delay timer: when the running direction drops out, a TON of 200–500 ms must elapse before the opposite direction can energise. This ensures the first contactor has fully mechanically opened before the second closes.
Frequently asked questions
How do you create a ladder diagram from scratch?
Start with the I/O allocation table (list all inputs and outputs with addresses and tag names). Write the boolean condition for each output in plain language. Map AND conditions to series contacts, OR conditions to parallel branches, and safety inhibit conditions to XIC contacts on NC-wired inputs. Add the output coil (OTE). Add a seal-in contact in parallel with any momentary Start input. Add timer and counter blocks for timed or counted operations. Comment every rung. Simulate all fault modes before commissioning.
What is the first step in designing a ladder diagram?
The first step is always the I/O allocation table — list every physical input and output with its PLC address, tag name, hardware wiring type (NO or NC), and plain-language description. Writing rungs before you have a complete I/O table leads to address errors, incorrect contact types, and missing safety interlocks.
How do I create an I/O allocation table?
Use a spreadsheet with columns: Address (I:0/0 or I0.0), Tag Name (PB_Start_NO), Signal Type (NO/NC), Description (Momentary green start pushbutton), and Safety Note (NC wired for fail-safe). List every discrete input, discrete output, analog input, and analog output. Verify the table against the electrical wiring diagram before writing a single rung.
What is the difference between SET/RESET and OTL/OTU?
They are the same function with different names. Allen-Bradley calls them OTL (Output Latch) and OTU (Output Unlatch). IEC 61131-3 and Siemens call them SET and RESET coils. Both set a bit to 1 (SET/OTL) or clear it to 0 (RESET/OTU) retentively — the bit holds its state even when the enabling rung goes FALSE, until explicitly changed.
How does a retentive timer differ from a standard TON?
A standard TON (on-delay timer) resets its accumulated value (ACC) to 0 whenever its enable rung goes FALSE — it starts the count fresh every time the enable goes TRUE. An RTO (Retentive Timer On) holds its ACC when the enable goes FALSE and resumes from where it left off on the next TRUE. This means an RTO can accumulate time across many short enable periods — essential for total-run-hours metering, machine cycle-time monitoring, and maintenance interval tracking.
How do I reset a counter in ladder logic?
Add a separate rung with a RES (Reset) instruction referencing the counter's address (e.g., RES C5:0). Enable this rung from whatever condition should reset the count — typically a batch-start pushbutton, a cycle-reset signal, or an operator panel button. The RES sets ACC to 0 and clears the DN bit, allowing the counter to start fresh. Every CTU or CTD in a program should have a corresponding RES rung.
Can a PLC have two rungs controlling the same output?
Two OTE coils with the same address is a bug — the last one scanned always overwrites the first. However, you CAN have one OTL and one OTU controlling the same address — they work as a matched pair (latch ON / latch OFF). You can also have multiple rungs reading the same output bit as an XIC or XIO contact (cross-referencing an output as a condition) — this is standard practice for seal-in contacts, status monitoring rungs, and interlock contacts.
What is the difference between a latch rung and a seal-in rung?
A seal-in rung uses a non-retentive OTE coil with a parallel XIC contact referencing the output's own bit. It holds the output ON after a momentary start command, but immediately de-energises when any series interlock (Stop, OL, fault) opens. A latch rung uses an OTL coil — the output stays ON regardless of what happens to the OTL rung, until an OTU rung explicitly clears it. Seal-in is preferred for motor starters (automatic stop on fault); OTL/OTU is preferred for alarms and state flags where the output must persist independently.
What are the most common ladder diagram examples in industry?
The five most universal examples are: (1) start/stop motor seal-in circuit, (2) forward/reverse motor interlock, (3) TON-controlled timed-start or timed-stop sequence, (4) CTU batch counter with reset, and (5) two-float-switch tank level controller. These five patterns appear in some form in almost every industrial PLC program ever written.