N-Channel JFET Symbol

N-Channel JFET schematic symbol
The N-Channel JFET schematic symbol. Standard-specific details are listed below where available.

Definition: The N-Channel JFET symbol represents a junction field-effect transistor whose N-type conductive channel between Drain and Source is narrowed by reverse-biasing the P-type Gate junction, drawn per IEC 60617 and ANSI Y32.2 / IEEE 315 as a vertical channel line with the gate arrow pointing IN toward the channel.

Also known as: N-channel JFET, junction field-effect transistor, N-JFET, junction FET, depletion-mode FET, JFET transistor, 2N5457.

What the N-Channel JFET symbol means

The N-Channel JFET symbol denotes a three-terminal, voltage-controlled semiconductor device (Gate, Drain, Source) in which current flows through an N-type silicon channel from Drain to Source. The gate forms a PN junction with the channel; applying a negative gate-source voltage (VGS) reverse-biases that junction, widening the depletion region and squeezing the channel until, at the pinch-off voltage VGS(off), drain current stops entirely. Because the controlling junction is reverse-biased, essentially no gate current flows, giving the JFET an extremely high input impedance of 10^9 ohms or more.

Unlike a MOSFET, a JFET is inherently a depletion-mode device: it is fully ON at VGS = 0 V, conducting its maximum drain current IDSS, and is progressively turned OFF as the gate is driven negative with respect to the source. The gate junction must never be forward-biased more than about 0.5 V or gate current will flow through the PN junction. In schematics the symbol appears wherever a low-noise, high-input-impedance amplifying or switching element is needed, and is distinguished from a BJT by its gate arrow meeting a straight channel bar rather than an emitter arrow on an angled lead.

How to identify the N-Channel JFET symbol

The JFET symbol is a vertical line (the channel) with the Drain lead leaving the top, the Source lead leaving the bottom, and the Gate lead meeting the channel from the side with an arrowhead. For the N-channel version the gate arrow points IN toward the channel (the arrow always points from P-type material to N-type, and here the gate is P-type against an N channel). This is the single reliable way to distinguish it from the P-channel JFET, whose arrow points outward.

IEC 60617 and ANSI Y32.2 / IEEE 315 draw the JFET essentially identically — channel bar, two straight D/S leads, arrowed gate lead — with the IEC version sometimes adding an envelope circle for a discrete packaged device. It differs from a MOSFET symbol in having a continuous (unbroken) channel line with no separate insulated-gate bar and no body/substrate arrow in the middle: the JFET gate arrow touches the channel directly because the gate is a junction, not an insulated electrode.

Live editor identity: Live-library identity: `jfet-n`, 50 × 50 canvas units, 3 logical terminals. Match this exact SVG and terminal list when identifying the placeable editor symbol; do not identify a physical package from the schematic outline alone.

Function and usage boundary

In operation, drain current ID flows through the N channel and is set by the gate-source voltage according to the square-law relation ID = IDSS × (1 − VGS/VGS(off))². At VGS = 0 the device conducts IDSS; as VGS goes more negative the depletion regions from the gate junction pinch the channel and ID falls, reaching zero at VGS(off) (typically −0.5 V to −8 V). In the ohmic region (low VDS) the JFET behaves as a voltage-controlled resistor; beyond pinch-off VDS it acts as a voltage-controlled current source with transconductance gm of typically 1–6 mS.

Because the gate draws essentially zero DC current, the JFET makes an excellent high-impedance buffer and low-noise amplifier front end. A common self-bias arrangement places a resistor in the source lead so the voltage drop across it holds the gate (grounded through a large resistor) negative with respect to the source — no negative supply needed.

Usage boundary: Use the N-Channel JFET abstraction only when the intended circuit can be expressed through these logical ports: `gate` (Gate), `drain` (Drain), `source` (Source). Select a versioned physical profile and exact manufacturer datasheet before assigning package pins, ratings, or fabrication dimensions.

Standards: IEC vs ANSI

IEC 60617IEC 60617 (database symbol set, formerly IEC 60617-05 for semiconductors) defines the JFET as a channel bar with drain and source leads and an arrowed gate lead, arrow toward the channel for N-channel. The IEC letter designator on schematics is T or Q per IEC 81346-2 conventions.
ANSI/IEEE 315ANSI Y32.2 / IEEE 315 clause for field-effect transistors defines the same channel-bar-plus-arrowed-gate construction, commonly drawn inside an envelope circle for discrete devices. The reference designator is Q followed by a number (Q1, Q2).
Key differenceIEC and ANSI JFET symbols are functionally identical; the main stylistic differences are the optional envelope circle (more common in ANSI/North American schematics) and whether the gate lead joins the channel opposite the source (offset-gate style) or at the channel centre. The arrow direction rule — in for N-channel, out for P-channel — is the same in both standards.

The displayed SVG is the live editor implementation, not a licensed reproduction or certification of an IEC or IEEE database glyph. Verify the exact official entry and project edition before issuing work.

Variant availability

Logical terminals

The live editor exposes `gate` (Gate), `drain` (Drain), `source` (Source). These are stable logical terminal IDs for diagram connectivity, not a promise that they equal physical package pin numbers.

Logical IDEditor terminal name
gateGate
drainDrain
sourceSource

Polarity and direction

This editor symbol does not encode a universal positive/negative orientation. Do not infer physical polarity or package pin numbering from left/right placement alone.

Reference designator

Q: Q is the editor library convention for this symbol family. Confirm the issued project convention before release.

Where the N-Channel JFET symbol is used

Key facts

Common interpretation mistakes

Frequently asked questions

How do I tell an N-channel JFET symbol from a P-channel JFET symbol?

Look at the gate arrowhead. On an N-channel JFET the arrow points IN toward the channel bar; on a P-channel JFET it points OUT away from the channel. The rule is that the arrow points from P-type material to N-type material — the gate of an N-channel device is P-type, so the arrow aims into the N channel.

What is the difference between a JFET symbol and a MOSFET symbol?

A JFET symbol shows the arrowed gate lead touching a continuous channel line directly, because the gate is a PN junction in contact with the channel. A MOSFET symbol shows the gate as a separate bar insulated from the channel, usually with a broken (enhancement) or solid (depletion) channel line and a substrate arrow in the middle. If the arrow is on the gate lead itself, it is a JFET; if the arrow is on the body/substrate connection, it is a MOSFET.

Why is a JFET called a depletion-mode device?

Because its channel conducts fully with zero gate voltage and is turned off by depleting it of carriers. Reverse-biasing the gate-channel junction widens the depletion region, narrowing the conductive channel until drain current stops at the pinch-off voltage VGS(off). A JFET cannot be operated in enhancement mode, since forward-biasing the gate junction would make gate current flow.

What do IDSS and VGS(off) mean on a JFET datasheet?

IDSS is the saturation drain current with the gate shorted to the source (VGS = 0 V) — the maximum useful drain current of the device. VGS(off), also called the pinch-off voltage VP, is the gate-source voltage at which drain current is reduced essentially to zero (negative for an N-channel JFET, typically −0.5 V to −8 V). Together they define the square-law transfer curve ID = IDSS × (1 − VGS/VGS(off))².

Why are JFETs used in audio preamps instead of BJTs?

Three reasons: the JFET gate draws essentially no current, so it presents a very high input impedance (megohms) that does not load high-impedance sources like guitar pickups and condenser capsules; its voltage noise at audio frequencies is low with no shot noise from base current; and its square-law transfer characteristic produces predominantly soft, low-order distortion that is often considered musically pleasant.

Can a JFET be used as a switch?

Yes. In the ohmic region a JFET acts as a resistor of a few tens to hundreds of ohms when ON (VGS = 0) and as an open circuit of gigohms when driven past VGS(off). JFET analog switches and choppers exploit this, though the ON resistance is higher and less constant than a MOSFET's, so MOSFETs dominate modern analog-switch ICs.

Sources and verification

Geometry fingerprint: a18a971abd2996c0. A changed SVG, canvas size, or terminal definition invalidates the recorded review.

Related symbols

Physical breadboard, PCB, and panel mapping

No universal physical profile is published for this symbol yet. Create a versioned custom part from the exact manufacturer dimensions and terminal map before fabrication.

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