P-Channel JFET Symbol
Definition: The P-Channel JFET symbol represents a junction field-effect transistor whose P-type conductive channel between Drain and Source is narrowed by reverse-biasing the N-type Gate junction, drawn per IEC 60617 and ANSI Y32.2 / IEEE 315 as a vertical channel line with the gate arrow pointing OUT away from the channel.
Also known as: P-channel JFET, P-JFET, junction field-effect transistor, junction FET, depletion-mode FET, 2N5460, J175.
What the P-Channel JFET symbol means
The P-Channel JFET symbol denotes the complementary polarity of the junction FET: a three-terminal device (Gate, Drain, Source) whose current is carried by holes through a P-type channel. All voltage polarities are reversed relative to the N-channel device — the Drain is operated negative with respect to the Source, and the gate-channel junction is reverse-biased by driving the Gate POSITIVE with respect to the Source. At VGS = 0 the channel conducts its maximum current IDSS; increasing positive VGS depletes the channel until current ceases at VGS(off) (a positive value, typically +0.5 V to +9 V).
Like its N-channel counterpart it is a depletion-mode, normally-ON device with near-zero gate current and very high input impedance. P-channel JFETs are used where the circuit topology needs a device referenced to the positive rail, in complementary low-noise input pairs, and in bipolar-supply designs. Because hole mobility is roughly half electron mobility, P-channel JFETs generally have lower transconductance and higher ON resistance than comparable N-channel parts, so N-channel devices dominate where either polarity would work.
How to identify the P-Channel JFET symbol
The symbol is drawn exactly like the N-channel JFET — vertical channel bar, Drain lead at top, Source lead at bottom, Gate lead entering from the side — except that the gate arrowhead points OUT away from the channel. The arrow points from P-type to N-type material; here the channel is P-type and the gate is N-type, so the arrow aims out of the channel toward the gate lead. This single arrow reversal is the only visual difference between the two polarities.
IEC 60617 and ANSI Y32.2 / IEEE 315 render the device the same way, with ANSI-style schematics more often enclosing the symbol in an envelope circle for a discrete packaged transistor. It is distinguished from a P-channel MOSFET by the arrow being on the gate lead touching a continuous channel line, rather than on a body connection to an insulated-gate structure.
Live editor identity: Live-library identity: `jfet-p`, 50 × 50 canvas units, 3 logical terminals. Match this exact SVG and terminal list when identifying the placeable editor symbol; do not identify a physical package from the schematic outline alone.
Function and usage boundary
Drain current in a P-channel JFET follows the same square law as the N-channel device, ID = IDSS × (1 − VGS/VGS(off))², with VGS and VGS(off) both positive and drain current flowing Source-to-Drain (conventional current) when the Drain is negative relative to the Source. Increasing positive gate-source voltage widens the gate junction depletion region, pinching the P channel and reducing current to zero at VGS(off).
In practical circuits the P-channel JFET is self-biased with a source resistor to the positive rail, mirroring the N-channel arrangement. It serves as an amplifier, source follower, voltage-controlled resistor, or current source exactly as the N-channel part does, and pairs with an N-channel JFET to build complementary differential inputs and push-pull stages in discrete op-amp and audio designs.
Usage boundary: Use the P-Channel JFET abstraction only when the intended circuit can be expressed through these logical ports: `gate` (Gate), `drain` (Drain), `source` (Source). Select a versioned physical profile and exact manufacturer datasheet before assigning package pins, ratings, or fabrication dimensions.
Standards: IEC vs ANSI
| IEC 60617 | IEC 60617 defines the P-channel JFET as the junction-FET symbol with the gate arrow directed away from the channel bar. Reference designator T or Q per IEC 81346-2. |
|---|---|
| ANSI/IEEE 315 | ANSI Y32.2 / IEEE 315 uses the identical channel-bar construction with the outward gate arrow, typically inside an envelope circle on discrete-transistor schematics, designated Q with a number. |
| Key difference | There is no functional difference between the IEC and ANSI P-channel JFET symbols; both rely on the outward gate arrow to mark the P channel. Stylistic variations are limited to the envelope circle and whether the gate joins the channel centred or offset toward the source end. |
The displayed SVG is the live editor implementation, not a licensed reproduction or certification of an IEC or IEEE database glyph. Verify the exact official entry and project edition before issuing work.
Variant availability
- Editor implementation (available): This is the exact SVG and terminal geometry placed by the CircuitDiagramMaker editor.
- IEC 60617 (reference only): IEC 60617 is the official international source. This page does not present the editor SVG as a licensed or certified IEC reproduction.
- ANSI/IEEE 315 (reference only): IEEE 315 is the North American reference listed by IEEE as inactive-reserved; use the edition required by the project.
Logical terminals
The live editor exposes `gate` (Gate), `drain` (Drain), `source` (Source). These are stable logical terminal IDs for diagram connectivity, not a promise that they equal physical package pin numbers.
| Logical ID | Editor terminal name |
|---|---|
| gate | Gate |
| drain | Drain |
| source | Source |
Polarity and direction
This editor symbol does not encode a universal positive/negative orientation. Do not infer physical polarity or package pin numbering from left/right placement alone.
Reference designator
Q: Q is the editor library convention for this symbol family. Confirm the issued project convention before release.
Where the P-Channel JFET symbol is used
- Complementary JFET input pairs in discrete low-noise op-amps and high-end audio preamplifiers
- Positive-rail-referenced current sources and active loads in bipolar-supply analog circuits
- Analog switches and signal muting where the control voltage is most conveniently positive (J174/J175 series)
- Phase-splitter and push-pull driver stages paired with N-channel JFETs in audio designs
- High-input-impedance buffers for sensors referenced to a positive supply
- Voltage-controlled attenuators and AGC circuits operating on signals near the positive rail
Key facts
- The gate arrow pointing OUT of the channel is the definitive marker of a P-channel JFET; the N-channel version has the arrow pointing in.
- All polarities are mirrored from the N-channel JFET: Drain negative with respect to Source, and a POSITIVE VGS turns the device off.
- It is a depletion-mode, normally-ON device conducting IDSS at VGS = 0 V, cut off at a positive VGS(off) of typically +0.5 V to +9 V.
- Gate current is essentially zero while the gate-channel junction stays reverse-biased, giving input impedances of 10^9 ohms and above.
- P-channel JFETs have roughly half the transconductance of comparable N-channel parts because hole mobility is lower than electron mobility, so fewer P-channel types are manufactured.
- Common part numbers: 2N5460, 2N5461, 2N5462, J174, J175, J176, J177.
- The same square-law equation ID = IDSS × (1 − VGS/VGS(off))² applies, with VGS and VGS(off) both positive quantities.
- Schematic reference designator is Q (ANSI/IEEE 315) or T/Q (IEC 81346-2).
Common interpretation mistakes
- Treating the P-Channel JFET drawing (50 × 50 canvas units) as a physical footprint. The schematic outline expresses electrical intent; package and panel dimensions come from the selected physical profile.
- Copying `gate`, `drain`, `source` directly to a wire marker or manufacturer package pin number. These are logical P-Channel JFET port IDs and require an exact ordered-part terminal map.
- Assuming every unlabelled or generic P-Channel JFET terminal has the same role across manufacturers and variants.
Frequently asked questions
Which way does the arrow point on a P-channel JFET symbol?
Away from the channel. The arrow on a JFET gate always points from P-type material to N-type material; in a P-channel device the gate is N-type and the channel is P-type, so the arrowhead points out of the channel bar toward the gate lead. An inward-pointing arrow means N-channel.
What gate voltage turns a P-channel JFET off?
A positive gate-source voltage. The device conducts fully at VGS = 0 V and is progressively pinched off as the gate is driven positive with respect to the source, cutting off completely at VGS(off), typically between +0.5 V and +9 V depending on the part. This is the exact mirror of the N-channel JFET, which cuts off at a negative VGS.
Why are P-channel JFETs less common than N-channel JFETs?
Hole mobility in silicon is roughly half of electron mobility, so a P-channel JFET of the same geometry has about half the transconductance and twice the channel resistance of an N-channel device. Designers therefore prefer N-channel parts wherever the topology permits, and manufacturers offer far fewer P-channel types — mainly for complementary pairs and positive-rail-referenced circuits.
Is a P-channel JFET the same as a P-channel MOSFET?
No. The JFET's gate is a reverse-biased PN junction touching the channel, making it a depletion-mode (normally-ON) device with a gate that must never be significantly forward-biased. A typical P-channel MOSFET is an enhancement-mode (normally-OFF) device with an insulated gate that can swing either polarity. Their symbols differ too: the JFET arrow is on the gate lead, the MOSFET arrow is on the body/substrate connection.
Can I substitute a P-channel JFET for an N-channel one?
Only by redesigning the circuit: supply polarity, drain-source orientation, and gate bias direction all reverse, and the P-channel part will typically have lower transconductance and different IDSS/VGS(off) ranges. Complementary designs deliberately use matched N-channel and P-channel pairs (e.g. 2N5457 with 2N5460) so each device sees its correct polarity.
Sources and verification
- IEC 60617:2026 DB — Graphical symbols for diagrams (International Electrotechnical Commission) — The current official IEC graphical-symbol database and the electrotechnical areas it covers. Exact symbol identity data requires IEC access.; claim scope: standards
- IEEE/ANSI 315-1975 — Graphic Symbols for Electrical and Electronics Diagrams (IEEE Standards Association) — The official catalogue record for North American diagram symbols and reference-designation letters; IEEE lists the standard as inactive-reserved.; claim scope: standards, reference_designator
- IEC 61666:2010+AMD1:2021 — Identification of terminals within a system (International Electrotechnical Commission) — General principles for identifying terminals within systems; it does not replace the exact ordered-device datasheet.
- IEC 81346-2:2019 — Object classes and reference-designation codes (International Electrotechnical Commission) — The official classification scheme used to form reference designations across technical disciplines.; claim scope: reference_designator
- IEC 61082-1:2014 — Preparation of documents used in electrotechnology (International Electrotechnical Commission) — General presentation rules for electrotechnical diagrams, drawings, and tables.; claim scope: standards, usage
Geometry fingerprint: 49c19b9cd6731b90. A changed SVG, canvas size, or terminal definition invalidates the recorded review.
Related symbols
- Darlington Pair symbol
- N-Channel MOSFET symbol
- NPN Transistor (BJT) symbol
- Op-Amp symbol
- P-Channel MOSFET symbol
- PNP Transistor (BJT) symbol
Physical breadboard, PCB, and panel mapping
No universal physical profile is published for this symbol yet. Create a versioned custom part from the exact manufacturer dimensions and terminal map before fabrication.
Place the P-Channel JFET symbol directly on a wiring diagram or schematic in the free online editor — no download required.