Demultiplexer Circuit Diagram: Selection Logic, Truth Table & 74138 IC
This is a free printable demultiplexer circuit diagram: download the diagram as SVG or open it and print to paper or PDF.
A demultiplexer (demux) is a combinational logic circuit that routes a single input signal to one of several output lines, selected by binary select inputs. A 1-to-4 demux has one data input (D), two select lines (S0, S1), and four outputs (Y0–Y3). Demultiplexers are the complement of multiplexers and are widely used in data distribution, memory address decoding, and serial-to-parallel conversion.
A demultiplexer reverses the operation of a multiplexer: instead of selecting one of many inputs, it routes a single input to one of many outputs. The selected output carries the data signal; all other outputs are forced to 0 (or 1 for active-LOW demuxes).
**Boolean Expressions for 1-to-4 Demux**
Y0 = D · S1' · S0' Y1 = D · S1' · S0 Y2 = D · S1 · S0' Y3 = D · S1 · S0
When S1=0, S0=0: only Y0 follows D; Y1=Y2=Y3=0. When S1=0, S0=1: only Y1 follows D. When S1=1, S0=0: only Y2 follows D. When S1=1, S0=1: only Y3 follows D.
**Gate-Level Construction**
A 1-to-4 demux requires: - 2 NOT gates (S0' and S1') - 4 AND gates (3-input each: data input D and two select terms)
Each AND gate corresponds to one output. For output Yi, the AND gate receives D, the appropriate combination of S1/S1', and S0/S0' for minterm i.
**1-to-2 Demux (Building Block)**
The simplest demux (1-to-2) has: Y0 = D·S' and Y1 = D·S. It uses 1 NOT and 2 AND gates. Cascading two 1-to-2 demuxes forms a 1-to-4 demux: the first stage routes D to two intermediate nodes, and each feeds a second-stage 1-to-2 demux.
**IC Implementation: 74HC138**
The 74HC138 (CMOS) and 74LS138 (TTL) are 3-to-8 line decoders/demultiplexers in a 16-pin DIP package: - Select inputs: A (pin 1), B (pin 2), C (pin 3) - Enable inputs: E1 (pin 6, active-HIGH), E2 (pin 4, active-LOW), E3 (pin 5, active-LOW) - Outputs: Y0–Y7 (pins 15–7), active-LOW - Vcc: pin 16, GND: pin 8
For normal operation, E1 must be HIGH and E2 and E3 must be LOW. The selected output goes LOW while all others remain HIGH. To use as a demux, connect the data signal to E1 (active-HIGH enable), and the selected output inverts D (active-LOW outputs).
**Using 74138 as a Decoder vs Demux**
As a decoder, tie E1=1, E2=E3=0 and use the binary address (A,B,C) to assert one of Y0–Y7 LOW — useful for memory chip select lines. As a demux, connect data to E1 and treat the selected Y output as inverted data: a HIGH data input pulls the selected output LOW.
**Practical Applications**
Demultiplexers are used in: memory bank selection (74138 decoding row/column addresses), time-division multiplexed displays (routing segment data to one digit at a time), serial-to-parallel data conversion, and building larger decoder arrays.
**Cascading 74138 for 4-to-16 Decoding**
Two 74138 ICs can form a 4-to-16 decoder: connect MSB select line to E1 of one chip (active-HIGH) and to E2 of the other (active-LOW), so only one chip is enabled at a time based on the fourth address bit.
Simulate your demultiplexer circuit diagram for free in the circuitdiagrammaker.com editor. Place AND and NOT gates, connect data and select lines, and verify that the selected output tracks the input while all others stay at 0.
How to wire demultiplexer circuit diagram
- Understand the data routing concept In a 1-to-4 demux, the select lines S1 and S0 form a 2-bit binary address (00=Y0, 01=Y1, 10=Y2, 11=Y3). The selected output receives the data input D; others are 0.
- Generate select complements Feed S0 and S1 through NOT gates to produce S0' and S1'. These complements are required by the AND gates for outputs Y0 and Y2 (S1') and Y0 and Y1 (S0').
- Wire four AND gates AND gate for Y0: inputs D, S1', S0'. AND for Y1: inputs D, S1', S0. AND for Y2: inputs D, S1, S0'. AND for Y3: inputs D, S1, S0. Each AND gate output is one demux output.
- For 74138 IC wiring Connect select lines to A (pin1), B (pin2), C (pin3). Tie E1 (pin6) HIGH and E2 (pin4) and E3 (pin5) LOW. Monitor active-LOW outputs Y0–Y7 on pins 15 down to 7.
- Use 74138 as a demux To route data through the 74138 as a demux, connect the data signal to E1 (pin 6). The selected output will go LOW when data is HIGH (active-LOW logic). To get active-HIGH data routing, add an inverter on each output.
- Test data routing With D=1 and all select combinations, confirm that exactly one output is HIGH at a time. With D=0, confirm all outputs are 0 regardless of select, proving data-gating behaviour.
- Cascade for larger demux For a 1-to-8 demux from two 1-to-4 stages: use a 1-to-2 first stage to route D to one of two second-stage demuxes; each second-stage 1-to-4 demux handles half the outputs controlled by the two lower-order select bits.
Specifications
| D=0, S1=0, S0=0 | Y0=0, Y1=0, Y2=0, Y3=0 |
|---|---|
| D=1, S1=0, S0=0 | Y0=1, Y1=0, Y2=0, Y3=0 |
| D=0, S1=0, S0=1 | Y0=0, Y1=0, Y2=0, Y3=0 |
| D=1, S1=0, S0=1 | Y0=0, Y1=1, Y2=0, Y3=0 |
| D=0, S1=1, S0=0 | Y0=0, Y1=0, Y2=0, Y3=0 |
| D=1, S1=1, S0=0 | Y0=0, Y1=0, Y2=1, Y3=0 |
| D=0, S1=1, S0=1 | Y0=0, Y1=0, Y2=0, Y3=0 |
| D=1, S1=1, S0=1 | Y0=0, Y1=0, Y2=0, Y3=1 |
| Y0 equation | Y0 = D·S1'·S0' |
| Y1 equation | Y1 = D·S1'·S0 |
| Y2 equation | Y2 = D·S1·S0' |
| Y3 equation | Y3 = D·S1·S0 |
| 74HC138 output polarity | Active-LOW (selected output = LOW) |
| 74HC138 enable | E1 HIGH + E2 LOW + E3 LOW |
Safety warnings
- Never leave multiple 74138 enable pins floating simultaneously — with E2 and E3 both floating near the CMOS threshold, the IC can conduct excessive current through its input protection diodes.
- When driving LEDs from 74138 active-LOW outputs, ensure the LED anode is at Vcc and the cathode connects through a resistor to the output pin — current flows from Vcc through the LED into the output when selected LOW.
Tools needed
- 74HC138 3-to-8 decoder/demux IC or 74HC139 dual 2-to-4 demux IC
- 74HC04 hex NOT gate and 74HC11 triple 3-input AND IC (for gate-level build)
- Breadboard, jumper wires, and 5V regulated power supply
- One toggle switch (data input) and two/three toggle switches (select lines)
- Four LEDs with 470Ω current-limiting resistors (output indicators)
- Multimeter or logic probe for signal verification
Common mistakes
- Confusing active-HIGH and active-LOW outputs when using the 74138: the selected output goes LOW, not HIGH. Using active-LOW outputs to drive active-HIGH devices (like standard LEDs without inversion) will light the wrong LED.
- Leaving enable pins E2 and E3 floating on the 74138: these active-LOW enables default HIGH if floating, disabling the chip. Always tie them to GND explicitly.
- Omitting the data line in AND gate wiring: connecting only the select lines without D results in a decoder (output asserted based solely on address) not a demultiplexer (output only follows D when addressed).
- Using S0 as MSB and S1 as LSB (reversed): this swaps Y1 and Y2, making the truth table appear inconsistent. Always confirm which select line is LSB in your schematic.
Troubleshooting
- All 74138 outputs remain HIGH regardless of inputs
- Cause: Enable pins E2 or E3 are HIGH (floating or connected to Vcc), disabling the IC Fix: Measure voltage at pins 4 and 5 — they must both be at GND (0V). Tie them firmly to GND with direct wire or 1kΩ resistors to GND.
- Wrong output asserted for given select code
- Cause: Select lines A, B, C connected to wrong IC pins Fix: Verify A=pin1, B=pin2, C=pin3 per the 74138 datasheet and re-seat jumper wires.
- Gate-level demux: two outputs active simultaneously
- Cause: NOT gate output floating, causing both the non-inverted and inverted select versions to appear HIGH Fix: Probe NOT gate output with logic probe. Replace IC if stuck. Ensure NOT gate Vcc and GND are connected.
- Data not routed — outputs are always 0
- Cause: Data input wire disconnected from AND gates or D tied to GND accidentally Fix: Probe the data input node at each AND gate. Ensure D switch pull-up resistor is in place so unpressed state is 0V, not floating.
Frequently asked questions
What is a demultiplexer in digital electronics?
A demultiplexer routes one data input to one of several output lines, selected by binary address inputs. A 1-to-4 demux routes one input to one of four outputs using 2 select lines.
What is the difference between a multiplexer and a demultiplexer?
A mux selects one of many inputs and routes it to one output (many-to-one). A demux takes one input and routes it to one of many outputs (one-to-many). They are complementary circuits often used together in data transmission systems.
What IC is used for a demultiplexer?
The 74HC138 is a 3-to-8 line decoder/demultiplexer. For a 1-to-4 demux, the 74HC139 provides two independent 1-to-4 demux/decoders in one 16-pin package.
What does active-LOW output mean on the 74138?
Active-LOW means the selected output is driven LOW (0V) to indicate selection, while all unselected outputs are HIGH. This requires inverting the outputs or using active-LOW input devices (like many SRAM chip-select pins).
How many gates does a 1-to-4 demux need?
A gate-level 1-to-4 demux needs 2 NOT gates and 4 three-input AND gates — six gate primitives total. No OR gate is needed since outputs are independent.
What is the 74HC139?
The 74HC139 is a dual 2-to-4 line decoder/demultiplexer in a 16-pin DIP package. Each half has a 2-bit select input (A, B), an active-LOW enable, and 4 active-LOW outputs — ideal for 1-to-4 demux applications.
Can a demux function as a decoder?
Yes. When the data input is held HIGH (enable always asserted), a demux behaves as a binary-to-one-of-N decoder. The 74138 is designed explicitly for this dual decoder/demux role.