Multiplexer Circuit Diagram: Selection Logic, Truth Table & 74151 IC
This is a free printable multiplexer circuit diagram: download the diagram as SVG or open it and print to paper or PDF.
A multiplexer (mux) is a combinational logic circuit that selects one of several input lines and forwards it to a single output line based on binary select signals. A 4-to-1 multiplexer has four data inputs (I0–I3), two select lines (S0, S1), and one output (Y). Multiplexers are fundamental to data routing, bus systems, and function generation in digital design.
A multiplexer acts like a digitally controlled switch: given N select lines, it routes one of 2^N data inputs to the output. The 4-to-1 mux is the most commonly studied configuration and serves as the building block for larger mux trees.
**Boolean Expression for 4-to-1 Mux**
Y = S1'S0'·I0 + S1'S0·I1 + S1S0'·I2 + S1S0·I3
Each term is a minterm of the select lines ANDed with the corresponding data input. When S1=0 and S0=0, only the first AND gate passes I0 to the output; all other AND gates output 0.
**Gate-Level Construction of a 4-to-1 Mux**
A 4-to-1 mux requires: - 2 NOT gates (to generate S0' and S1') - 4 AND gates (3-input each: one inverted/non-inverted combination of S1, S0, and the data input) - 1 OR gate (4-input, to combine the four AND gate outputs)
Alternatively, four 2-to-1 muxes can form a 4-to-1 mux in a tree topology, which is how synthesis tools typically map mux functions to LUTs in FPGAs.
**2-to-1 Multiplexer (Building Block)**
The simplest multiplexer, the 2-to-1 mux, has the equation: Y = S'·I0 + S·I1. It requires 1 NOT, 2 AND, and 1 OR gate — or a single CMOS transmission gate pair.
**IC Implementation: 74151**
The 74HC151 (CMOS) and 74LS151 (TTL) are 8-to-1 multiplexers in a 16-pin DIP package: - Data inputs: D0–D7 (pins 4–11) - Select inputs: S0 (pin 11), S1 (pin 10), S2 (pin 9) - Enable (active-low strobe): pin 7; must be LOW for normal operation - Output W (non-inverted): pin 5 - Output Y (inverted): pin 6 - Vcc: pin 16, GND: pin 8
The 74151 can implement any 3-variable Boolean function directly, making it a classic function generator. For a 4-to-1 subset, tie S2 to GND and use D0–D3.
**The 74153 Dual 4-to-1 Mux**
The 74HC153 provides two independent 4-to-1 multiplexers in one 16-pin package, sharing select lines. Each half has 4 data inputs, one output, and one active-low enable. This is commonly used in introductory digital electronics labs.
**Applications of Multiplexers**
Muxes are used in: CPU bus architecture (selecting data sources), FPGA look-up tables (LUTs implement functions as mux trees), serial data transmission (parallel-to-serial conversion via a mux clocked by a counter), and address decoding in memory systems.
**Mux as a Function Generator**
Any N-variable Boolean function can be implemented with a 2^(N−1)-to-1 mux by tying the select lines to N−1 variables and wiring data inputs to the remaining variable or constants. For example, a 4-to-1 mux can implement any 3-variable function with data inputs set to 0, 1, A, or A'.
Build and simulate your multiplexer circuit diagram in the free circuitdiagrammaker.com editor. Place AND, NOT, and OR gates, connect the select and data lines, and toggle inputs to verify that the correct data input is routed to the output for each select combination.
How to wire multiplexer circuit diagram
- Choose your mux size For a 4-to-1 mux, you need 2 select lines (S0, S1) and 4 data inputs (I0–I3). Decide between gate-level construction or using a 74153/74151 IC.
- Generate select complements Connect S0 and S1 each through a NOT gate (74HC04) to produce S0' and S1'. These are needed by the AND gates for lower-numbered data inputs.
- Wire four AND gates AND gate 0: inputs S1', S0', I0 → output term0. AND gate 1: inputs S1', S0, I1 → term1. AND gate 2: inputs S1, S0', I2 → term2. AND gate 3: inputs S1, S0, I3 → term3.
- OR the AND outputs Feed term0 through term3 into a 4-input OR gate (or cascade two 2-input OR gates). The OR output is mux output Y.
- For 74153 IC wiring Connect data inputs to pins 6,5,4,3 (first mux) or 14,13,12,11 (second mux). Connect shared select inputs S0 (pin 14) and S1 (pin 2). Pull enable pins 1 and 15 to GND for always-enabled operation.
- Verify selection logic Set I0=1, I1=0, I2=0, I3=0. Sweep S1:S0 from 00 to 11 — only when S1=S0=0 should Y=1. Then set I2=1 and confirm Y=1 only for S1=1,S0=0.
- Cascade for larger mux To build an 8-to-1 mux from 4-to-1 muxes: use two 4-to-1 muxes (each handling 4 inputs) and feed their outputs into a 2-to-1 mux controlled by the MSB select line.
Specifications
| S1=0, S0=0 | Y = I0 |
|---|---|
| S1=0, S0=1 | Y = I1 |
| S1=1, S0=0 | Y = I2 |
| S1=1, S0=1 | Y = I3 |
| Boolean expression | Y = S1'S0'I0 + S1'S0·I1 + S1S0'I2 + S1S0·I3 |
| 74151 IC type | 8-to-1 multiplexer, 16-pin DIP |
| 74153 IC type | Dual 4-to-1 multiplexer, 16-pin DIP |
| 74151 enable pin | Pin 7, active LOW (strobe) |
| 74151 select pins | S0=pin11, S1=pin10, S2=pin9 |
| Gates for 4-to-1 mux | 2× NOT, 4× 3-input AND, 1× 4-input OR |
| Supply voltage (74HC) | 2V to 6V |
| Supply voltage (74LS) | 4.75V to 5.25V |
Safety warnings
- Never leave select or enable inputs floating on CMOS mux ICs — floating CMOS inputs can settle at the threshold voltage, causing excessive current draw and thermal damage to the IC.
- The 74LS series mux ICs require a tightly regulated 5V ±5% supply; operating above 5.5V can permanently damage the device. Use a dedicated 5V regulator, not an unregulated bench supply.
Tools needed
- 74HC153 dual 4-to-1 mux IC or 74HC151 8-to-1 mux IC
- 74HC04 hex NOT gate IC (for gate-level build)
- 74HC08 quad AND IC and 74HC32 quad OR IC (gate-level build)
- Breadboard, jumper wires, and 5V power supply
- Four toggle switches (data inputs) and two toggle switches (select lines)
- Logic probe or oscilloscope for output verification
Common mistakes
- Leaving the 74151/74153 enable pin floating instead of tying it to GND: a floating enable pin disables the mux unpredictably. Always tie it firmly to GND (logic 0) for always-on operation.
- Swapping S0 and S1 in the AND gate connections: this rotates the truth table, making I1 appear at Y when S=00 instead of I0. Always double-check the AND gate input assignments against the Boolean expression.
- Using 2-input AND gates without accounting for the third input being the data line: each AND gate in a 4-to-1 mux must be 3-input (S1-term, S0-term, and data). Using 2-input ANDs and omitting the data connection passes a fixed 1 to the OR gate.
- Forgetting to cascade OR gates: a single 2-input OR gate handles only 2 of the 4 AND outputs. Use a 4-input OR gate or two cascaded 2-input OR gates to combine all four AND terms.
Troubleshooting
- Output Y is always 0 regardless of select lines
- Cause: 74151/74153 enable pin HIGH or floating, or power missing from IC Fix: Confirm enable pin is tied to GND. Measure Vcc and GND at the IC. Probe the output pin directly to rule out LED/resistor issue.
- Output follows wrong data input for select values
- Cause: S0 and S1 connections to IC select pins swapped Fix: Consult datasheet pinout and verify S0 connects to the correct select pin (e.g. pin 14 on 74153, not pin 2).
- Gate-level mux output is always 1 with any input=1
- Cause: OR gate receiving a stuck-HIGH signal from one AND gate due to a floating NOT gate output Fix: Probe each NOT gate output — a floating NOT output typically reads indeterminate. Confirm NOT gate Vcc and replace IC if output is always HIGH.
- Mux selects the right channel but output is inverted
- Cause: Using the inverted output pin (Y bar) on the 74151 instead of the non-inverted W output Fix: On the 74151, use pin 5 (W, non-inverted output) not pin 6 (Y bar, inverted output).
Frequently asked questions
What is a multiplexer in digital electronics?
A multiplexer selects one of several data input lines and forwards it to a single output, controlled by binary select signals. A 4-to-1 mux selects among 4 inputs using 2 select lines.
What is the Boolean expression for a 4-to-1 multiplexer?
Y = S1'S0'·I0 + S1'S0·I1 + S1S0'·I2 + S1S0·I3. Each AND term enables exactly one input for a given select line combination.
What IC is used for a 4-to-1 multiplexer?
The 74HC153 provides two independent 4-to-1 muxes in one 16-pin DIP package. The 74HC151 is an 8-to-1 mux that can be used as a 4-to-1 by tying S2 to GND and using only D0–D3.
How many gates does a 4-to-1 mux need?
A gate-level 4-to-1 mux requires 2 NOT gates, four 3-input AND gates, and one 4-input OR gate (or two cascaded 2-input OR gates) — 7 gate primitives total.
What is the difference between a multiplexer and a demultiplexer?
A mux selects one of many inputs and routes it to a single output. A demux takes one input and routes it to one of many outputs based on select lines — they are complementary circuits.
Can a multiplexer implement Boolean functions?
Yes. An N-variable Boolean function can be implemented with a 2^(N-1)-to-1 mux. The 74151 8-to-1 mux is a classic 3-variable function generator by wiring data inputs to constants or variables.
What is the enable (strobe) pin on a 74151 mux?
Pin 7 on the 74151 is an active-LOW enable (strobe). It must be held LOW for the mux to operate normally. When HIGH, the output W is forced LOW regardless of select or data inputs.