AND Gate Circuit Diagram: How It Works, Truth Table & IC Realisation
This is a free printable and gate circuit diagram: download the diagram as SVG or open it and print to paper or PDF.
An AND gate is a fundamental digital logic gate whose output is HIGH (1) only when ALL of its inputs are simultaneously HIGH. It implements the Boolean AND operation, written as Y = A · B (or simply Y = AB). AND gates are the building blocks of arithmetic circuits, address decoders, and virtually every digital system.
The AND gate performs logical conjunction. For a two-input AND gate the Boolean expression is Y = A · B, which reads 'Y equals A AND B'. The output is true only when both A and B are true; any LOW input forces the output LOW.
Truth table for a 2-input AND gate: when A=0 and B=0 the output Y=0; when A=0 and B=1, Y=0; when A=1 and B=0, Y=0; and only when A=1 and B=1 does Y=1. This single HIGH output row is the defining characteristic of the AND function. For a 3-input gate (Y = A · B · C) there is only one HIGH output row, when all three inputs equal 1.
The standard logic symbol for a 2-input AND gate is a D-shaped body with two input lines on the flat side and one output on the curved side. In older MIL/ANSI notation the same distinctive curved front face is used; IEC rectangular-block notation labels the body with an ampersand (&).
Transistor realisation using bipolar junction transistors (BJTs): connect two NPN transistors Q1 and Q2 in series (collector of Q2 to supply Vcc through a pull-up resistor R_C, emitter of Q1 to ground). Input A drives the base of Q1 through a base resistor and input B drives the base of Q2 through another base resistor. The output is taken from the collector of Q2. Only when both Q1 and Q2 are driven into saturation does current flow through R_C and the output is pulled LOW — this is a negative-logic AND (actually a NAND at the collector); inverting the output yields the AND. A simpler resistor-transistor logic (RTL) AND uses a single transistor with both inputs driving the base through separate resistors: both must be HIGH to saturate the transistor.
Diode-resistor logic (DRL): two diodes D1 and D2 have their anodes connected to inputs A and B respectively, and their cathodes joined together at the output node, which is pulled HIGH through a resistor R to Vcc. If either input is LOW (0V) the corresponding diode conducts and pulls the output LOW. Only when both inputs are HIGH do both diodes remain reverse-biased, allowing the pull-up resistor to hold the output HIGH. DRL is simple but suffers from voltage drops and is not cascadable without a transistor buffer.
Integrated circuit: the standard TTL AND gate IC is the 74LS08 (quad 2-input AND gates, 14-pin DIP). The older 7408 is the original 5V TTL version. CMOS equivalents are the 74HC08 and CD4081B (the CD4081 is a quad 2-input AND in the 4000-series CMOS family). Each package contains four independent 2-input AND gates sharing only the power-supply pins (Vcc pin 14, GND pin 7).
Practical circuit connections: connect Vcc (pin 14) to +5V and GND (pin 7) to 0V. Apply logic-level signals to pins 1 and 2 (gate 1A and 1B); read the output at pin 3 (gate 1Y). Decouple the supply with a 100nF ceramic capacitor placed close to the IC.
AND gates in combinational logic: combining AND with OR and NOT produces all other logic functions (AND-OR-INVERT networks). Two AND gates plus an OR gate form a sum-of-products network. AND gates are used in multiplexers to select data lines, in arithmetic units to generate carry signals, and in control logic to enable registers only when multiple conditions are met.
Want to wire up and simulate this circuit immediately? Open the free Circuit Diagram Maker editor at circuitdiagrammaker.com, drag AND gate symbols onto the canvas, connect input switches and an LED output, and watch the truth table come to life in seconds — no installation required.
How to wire and gate circuit diagram
- Gather components Obtain a 7408 (or 74LS08) quad AND gate IC, a breadboard, a 5V power supply, two push-button switches, a 470Ω resistor, and an LED.
- Power the IC Insert the IC into the breadboard. Connect pin 14 to the +5V rail and pin 7 to the GND rail. Place a 100nF decoupling capacitor between Vcc and GND near the IC.
- Connect inputs Wire one push-button between +5V and pin 1 (input A) with a 10kΩ pull-down resistor to GND. Repeat for pin 2 (input B).
- Connect output LED Connect pin 3 (output Y) through the 470Ω resistor to the anode of the LED, and the cathode of the LED to GND.
- Test all input combinations Press neither button (A=0, B=0), then each button alone, then both together. The LED should light only when both buttons are pressed simultaneously.
- Verify with multimeter Measure the voltage at pin 3 for each input combination. Expect ~0.2V for LOW and ~3.4V for HIGH with TTL logic.
- Simulate online Reproduce the same circuit in the Circuit Diagram Maker editor to cross-check your physical results without needing hardware.
Specifications
| A=0, B=0 | Y=0 |
|---|---|
| A=0, B=1 | Y=0 |
| A=1, B=0 | Y=0 |
| A=1, B=1 | Y=1 |
| Boolean expression | Y = A · B |
| TTL IC (2-input) | 7408 / 74LS08 |
| CMOS IC (2-input) | 74HC08 / CD4081B |
| Supply voltage (TTL) | 5V ±5% |
| Supply voltage (CMOS 74HC) | 2V – 6V |
| Fan-out (74LS08) | 10 LS-TTL loads |
| Propagation delay (74LS08) | 9 ns typical |
Safety warnings
- Never exceed the maximum supply voltage (5.5V for TTL 7408; 6V for 74HC08). Overvoltage permanently damages the IC.
- Always discharge static electricity before handling CMOS ICs — touch a grounded metal surface first, as CMOS gate oxides are sensitive to electrostatic discharge.
Tools needed
- 7408 or 74LS08 quad AND gate IC
- Breadboard and jumper wires
- 5V DC power supply or USB breadboard supply
- Digital multimeter
- LED and 470Ω current-limiting resistor
- 10kΩ pull-down resistors for inputs
Common mistakes
- Floating inputs: leaving an input pin unconnected causes unpredictable logic levels. Always tie unused inputs to a defined logic level (Vcc for HIGH, GND for LOW) through a resistor.
- Missing decoupling capacitor: omitting the 100nF bypass capacitor on the power supply pin causes voltage spikes that produce false outputs, especially at higher frequencies.
- Confusing 7408 with 7400: both are quad 14-pin DIPs but 7400 is a NAND gate, not AND. Check the part number before inserting the IC.
- Incorrect pin assignment: each 7408 gate occupies a different set of pins (1-2-3, 4-5-6, 9-10-8, 12-13-11). Using the wrong pin numbers gives no output.
Troubleshooting
- Output always LOW regardless of inputs
- Cause: Power supply not connected or IC inserted backwards Fix: Verify Vcc on pin 14 and GND on pin 7. Check IC orientation — pin 1 is indicated by a notch or dot.
- Output always HIGH regardless of inputs
- Cause: Output pin is shorted to Vcc or inputs are both floating HIGH Fix: Check wiring for shorts. Add pull-down resistors on input lines to ensure clean LOW levels.
- LED dim or flickering
- Cause: Current-limiting resistor too large, or ground connection intermittent Fix: Reduce resistor to 470Ω. Ensure GND rail is continuous and both IC pin 7 and LED cathode are grounded.
Frequently asked questions
What is the truth table for an AND gate circuit diagram?
A 2-input AND gate outputs HIGH (1) only when both inputs A and B are HIGH. The full truth table has four rows: 0·0=0, 0·1=0, 1·0=0, 1·1=1.
Which IC number is used for an AND gate?
The standard TTL AND gate IC is the 7408 (or 74LS08), which contains four independent 2-input AND gates in a 14-pin DIP package. The CMOS equivalent is the 74HC08 or CD4081B.
How do you build an AND gate from transistors?
Connect two NPN transistors in series between Vcc and GND with a pull-up resistor. Feed the two inputs to the bases. The output at the collector of the second transistor is LOW unless both transistors are saturated by HIGH inputs, giving AND behaviour.
What is the Boolean expression for an AND gate?
The Boolean expression is Y = A · B. The dot (·) denotes the AND operation; it is often omitted and written simply as Y = AB.
What is the difference between an AND gate and a NAND gate circuit diagram?
A NAND gate is an AND gate followed by an inverter. Its output is LOW only when ALL inputs are HIGH — the exact opposite of AND. The circuit symbol adds a bubble at the AND gate output.
Can I use NAND gates to make an AND gate?
Yes. Connect the output of a 2-input NAND gate (e.g., from a 7400 IC) to the inputs of a second NAND gate configured as an inverter. This produces Y = A · B.
What voltage levels represent logic HIGH and LOW in TTL AND gates?
For TTL (7408): logic LOW input is 0V–0.8V and output is 0V–0.4V; logic HIGH input is 2V–5V and output is 2.4V–5V. CMOS levels scale with the supply voltage.