XOR Gate Circuit Diagram: Exclusive OR Logic, Truth Table & IC Realisation
This is a free printable xor gate circuit diagram: download the diagram as SVG or open it and print to paper or PDF.
An XOR (Exclusive OR) gate outputs HIGH only when its inputs are different — one HIGH and one LOW. When both inputs are the same (both LOW or both HIGH) the output is LOW. The Boolean expression is Y = A ⊕ B = AB' + A'B. XOR gates are at the heart of binary adders, parity generators, and comparator circuits.
The XOR gate implements exclusive disjunction. Unlike the inclusive OR gate, XOR excludes the case where both inputs are simultaneously HIGH. The Boolean expression Y = A ⊕ B can also be written as Y = AB' + A'B (sum of minterms where inputs differ) or as Y = (A + B)(A' + B') = (A + B)(AB)', which shows XOR as an AND-OR network.
Truth table: when A=0, B=0, Y=0; when A=0, B=1, Y=1; when A=1, B=0, Y=1; when A=1, B=1, Y=0. The pattern of outputs (0,1,1,0) shows that Y is HIGH when inputs differ and LOW when they are equal. This 'inequality detector' property is what makes XOR so useful.
Logic symbol: the XOR gate uses the same curved shield shape as an OR gate, but with an extra curved line parallel to the flat input side, creating a double-curved back edge. This additional arc is the visual cue distinguishing XOR from OR. In IEC notation the body is rectangular with the label '=1'.
Four-NAND implementation: any XOR gate can be built from four 2-input NAND gates using a single 7400 IC. The circuit is: - G1: NAND of A and B → P = (AB)' - G2: NAND of A and P → Q = (AP)' - G3: NAND of B and P → R = (BP)' - G4: NAND of Q and R → Y = (QR)' = A ⊕ B This is a standard XOR implementation that a student can verify step by step.
Alternative: XOR can also be realised with five NAND gates, but the four-NAND version above is optimal. With NOR gates it requires five gates. With AND-OR-NOT networks: Y = AB' + A'B uses two AND gates, two inverters, and one OR gate.
Integrated circuit: the 7486 is the standard TTL quad 2-input XOR gate (14-pin DIP). Low-power Schottky: 74LS86. CMOS: 74HC86, CD4070B. Pinout follows the standard quad pattern: gate 1 — pins 1, 2 inputs, pin 3 output; gate 2 — pins 4, 5 inputs, pin 6 output; gate 3 — pins 9, 10 inputs, pin 8 output; gate 4 — pins 12, 13 inputs, pin 11 output. Vcc pin 14, GND pin 7.
Key applications: 1. Half adder: the Sum output of a half adder is A ⊕ B. One XOR gate provides the single-bit sum. 2. Full adder: the sum in a full adder is A ⊕ B ⊕ Cin. Two XOR gates cascade to compute this. 3. Parity generator/checker: XOR of all data bits generates an even-parity bit. The same circuit checks parity on receipt. 4. Comparator: if A ⊕ B = 0, the bits are equal; if A ⊕ B = 1, they differ. Cascading XOR through a NOR gives a word-level equality flag. 5. Programmable inverter: if one XOR input is 0, the output passes the other input unchanged. If the control input is 1, the output is the complement of the data input. This property is used in CRC circuits and selective bit inversion.
XOR in arithmetic: binary addition produces a Sum = A ⊕ B and a Carry = A · B. This direct correspondence between XOR and addition makes the XOR gate the fundamental arithmetic element in every ALU, from simple 4-bit ripple-carry adders to 64-bit carry-lookahead units in modern CPUs.
Build a parity generator or a half adder using XOR gates right now in the Circuit Diagram Maker free online editor — drag 7486 gate symbols, connect inputs, and instantly verify the truth table without any hardware.
How to wire xor gate circuit diagram
- Gather components Get a 7486 quad XOR gate IC (or a 7400 NAND IC to implement XOR from four NANDs), a breadboard, 5V supply, two switches, pull-down resistors, and an LED with 470Ω resistor.
- Power the 7486 Insert the IC into the breadboard. Connect pin 14 to +5V and pin 7 to GND with a 100nF decoupling capacitor between them.
- Wire inputs Connect push-button switches to pins 1 and 2 (inputs 1A and 1B) each with a 10kΩ pull-down resistor to GND.
- Connect output LED Connect pin 3 (output 1Y) through a 470Ω resistor to the LED anode; LED cathode to GND.
- Test XOR truth table Step through all four combinations: 00 and 11 → LED off; 01 and 10 → LED on. The LED lights only when inputs differ.
- Implement XOR from NANDs On a 7400 IC, use gate 1 as G1 (NAND A,B→P), gate 2 as G2 (NAND A,P→Q), gate 3 as G3 (NAND B,P→R), gate 4 as G4 (NAND Q,R→Y). Verify same truth table.
- Extend to half adder Connect a second 7408 AND gate alongside: AND of A and B gives the Carry output. Together with the XOR Sum output you have a complete half adder.
Specifications
| A=0, B=0 | Y=0 |
|---|---|
| A=0, B=1 | Y=1 |
| A=1, B=0 | Y=1 |
| A=1, B=1 | Y=0 |
| Boolean expression | Y = A ⊕ B = AB' + A'B |
| TTL IC (2-input) | 7486 / 74LS86 |
| CMOS IC (2-input) | 74HC86 / CD4070B |
| NAND gate implementation | 4 × 2-input NAND gates (one 7400 IC) |
| Supply voltage (TTL) | 5V ±5% |
| Propagation delay (74LS86) | 30 ns typical |
| Fan-out (74LS86) | 10 LS-TTL loads |
Safety warnings
- The 7486 propagation delay (30ns) is longer than most other 74-series gates — do not use it in timing-critical paths without accounting for this delay in your setup/hold time analysis.
- CMOS XOR ICs (74HC86) have high input impedance — always connect unused inputs to a defined logic level to prevent static charge buildup and latch-up.
Tools needed
- 7486 or 74LS86 quad XOR gate IC (or 7400 NAND for 4-NAND implementation)
- Breadboard and jumper wires
- 5V DC power supply
- Digital multimeter or logic probe
- LED and 470Ω resistor
- 10kΩ pull-down resistors and 100nF decoupling capacitor
Common mistakes
- Confusing XOR with OR: XOR outputs 0 when both inputs are 1, but OR outputs 1. This error causes incorrect half-adder sums when substituting OR for XOR.
- Using an incorrect NAND-gate wiring for the 4-NAND XOR: gate G1 (NAND of both inputs) must feed into both G2 and G3 as one input. Misconnecting P to only one of G2 or G3 produces the wrong function.
- Not decoupling the 7486: XOR gates are relatively slow (30ns typ.) and sensitive to supply glitches. A missing 100nF bypass capacitor causes noise-induced false transitions in fast circuits.
- Treating XOR as commutative but not associative incorrectly: XOR is both commutative (A⊕B = B⊕A) and associative ((A⊕B)⊕C = A⊕(B⊕C)), but students sometimes incorrectly simplify A⊕A as A instead of 0.
Troubleshooting
- Output stays 0 for all input combinations
- Cause: Both inputs tied together accidentally, making circuit behave as A⊕A = 0 always Fix: Verify that pin 1 and pin 2 are driven independently. Check for accidental short between input pins.
- NAND-based XOR produces wrong outputs
- Cause: Intermediate P node (G1 output) not connected to both G2 and G3 Fix: Trace the wire from G1 output (NAND of A,B) and verify it reaches one input each of G2 and G3. Use a logic probe to check P value.
- Parity generator gives wrong parity output intermittently
- Cause: Propagation delay mismatch causing glitches at the XOR output during simultaneous input transitions Fix: Add a small output register (D flip-flop clocked after inputs settle) to latch the XOR output and eliminate combinational glitches.
Frequently asked questions
What is the truth table for an XOR gate circuit diagram?
A 2-input XOR gate outputs 1 when inputs differ (A≠B) and 0 when inputs are the same. Full table: 00→0, 01→1, 10→1, 11→0.
Which IC number is used for an XOR gate?
The 7486 (or 74LS86) is the standard TTL quad 2-input XOR gate in a 14-pin DIP. The CMOS equivalent is 74HC86 or CD4070B.
How do you build an XOR gate using only NAND gates?
Use four 2-input NAND gates: G1=NAND(A,B)=P; G2=NAND(A,P)=Q; G3=NAND(B,P)=R; G4=NAND(Q,R)=Y=A⊕B. One 7400 IC provides all four gates needed.
What is the Boolean expression for an XOR gate?
Y = A ⊕ B = AB' + A'B. The output is 1 when A is 1 and B is 0, OR when A is 0 and B is 1.
What is XOR used for in digital circuits?
XOR computes binary addition sums (half adder, full adder), generates and checks parity bits, implements programmable inverters, detects bit differences in comparators, and forms the core of CRC error-detection circuits.
What is the difference between XOR and XNOR?
XOR outputs 1 when inputs differ; XNOR outputs 1 when inputs are the same. XNOR is the complement (NOT) of XOR. Their truth tables are bitwise complements of each other.
Why does XOR output 0 when both inputs are 1?
XOR means 'exclusively one input is 1'. When both inputs are 1 neither input is exclusively 1, so the output is 0. This distinguishes it from the inclusive OR gate, which outputs 1 for the 1,1 case.