Half Adder Circuit Diagram: Gate-Level Logic, Truth Table & Build Guide
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A half adder is the simplest binary addition circuit, computing the sum and carry-out of two single-bit inputs A and B. It uses one XOR gate for the Sum (S = A ⊕ B) and one AND gate for the Carry (C = A · B). The half adder is a fundamental building block of full adders, ripple-carry adders, and all digital arithmetic units.
The half adder performs 1-bit binary addition. Given two input bits A and B, it produces two outputs: Sum (S) and Carry (C). The word 'half' reflects the fact that it cannot handle a carry-in from a previous bit position — that limitation is addressed by the full adder.
Boolean equations: S = A ⊕ B (Sum is the XOR of inputs) and C = A · B (Carry is the AND of inputs). These two equations completely describe the half adder's behaviour.
Truth table: when A=0, B=0, S=0, C=0 (0+0=0, no carry); when A=0, B=1, S=1, C=0 (0+1=1, no carry); when A=1, B=0, S=1, C=0 (1+0=1, no carry); when A=1, B=1, S=0, C=1 (1+1=2 in decimal, which is 10 in binary — Sum=0, Carry=1).
Gate-level schematic: the half adder requires only two gates. Connect input lines A and B to both the inputs of an XOR gate and the inputs of an AND gate. The XOR output is S; the AND output is C. The two gates operate in parallel — both receive the same two inputs simultaneously.
IC implementation: using the 7486 quad XOR gate (for Sum) and the 7408 quad AND gate (for Carry), a half adder occupies one gate from each IC. Alternatively, a single-chip half adder can be built using NAND gates only. The NAND-based half adder uses five 2-input NAND gates (one 7400 IC is not quite sufficient alone since you need 5 gates and one 7400 contains 4, but the 5th can come from a second 7400). The NAND-only approach: G1=NAND(A,B)=P; G2=NAND(A,P); G3=NAND(B,P); G4=NAND(G2,G3)=Sum; G5=NOT(P)=NAND(P,P)=Carry.
Analysis of the NAND-only half adder: G1 gives P=(AB)'. G4 = NAND(NAND(A,P), NAND(B,P)) = A⊕B = Sum. G5 = NOT(P) = NOT((AB)') = AB = Carry. This is elegant: the intermediate NAND node P naturally provides (AB)' which, when inverted, gives the carry.
Half adder in cascaded adders: to add two 4-bit numbers using half adders, you would need a half adder for the least-significant bit position (no carry-in) and three full adders for the remaining three positions (each taking carry-out from the previous stage as carry-in). This forms the foundation of the ripple-carry adder.
Real-world IC: the 74283 is a 4-bit binary full adder IC, but understanding the half adder is the prerequisite. The half adder concept maps directly to the sum-bit generation in look-ahead carry adders found in CPUs.
Typical student experiment: on a breadboard with a 7486 (XOR) and 7408 (AND), connect two switches as inputs and two LEDs as Sum and Carry outputs. Step through all four input combinations and observe the outputs — 1+1 (both buttons pressed) should give Sum LED off and Carry LED on (representing binary 10).
Design the complete half adder in the Circuit Diagram Maker free browser-based editor in under 2 minutes: drag an XOR symbol and an AND symbol, connect them to shared inputs A and B, and attach LED indicators to both outputs.
How to wire half adder circuit diagram
- Gather components Obtain a 7486 XOR IC and a 7408 AND IC (or two 7400 NAND ICs for NAND-only method), a breadboard, 5V supply, two toggle switches, two LEDs (one for Sum, one for Carry), and two 470Ω resistors.
- Power both ICs Insert both ICs into the breadboard. Connect pin 14 to +5V and pin 7 to GND on each. Add 100nF decoupling capacitors on both ICs.
- Wire input A Connect a toggle switch to a bus wire labelled A. Run A to pin 1 of the 7486 (XOR input 1A) and to pin 1 of the 7408 (AND input 1A). Add a 10kΩ pull-down resistor on the A line.
- Wire input B Similarly connect input B to pin 2 of the 7486 (XOR input 1B) and pin 2 of the 7408 (AND input 1B), with a 10kΩ pull-down resistor.
- Connect Sum LED Wire pin 3 of the 7486 (XOR output) through a 470Ω resistor to the Sum LED anode; LED cathode to GND.
- Connect Carry LED Wire pin 3 of the 7408 (AND output) through a second 470Ω resistor to the Carry LED anode; cathode to GND.
- Test all four input combinations 0+0: both LEDs off. 0+1 or 1+0: Sum LED on, Carry LED off. 1+1: Sum LED off, Carry LED on — representing the binary result 10 (decimal 2).
Specifications
| A=0, B=0 → S, C | S=0, C=0 |
|---|---|
| A=0, B=1 → S, C | S=1, C=0 |
| A=1, B=0 → S, C | S=1, C=0 |
| A=1, B=1 → S, C | S=0, C=1 |
| Sum equation | S = A ⊕ B |
| Carry equation | C = A · B |
| Gates required (XOR+AND) | 1 × XOR gate + 1 × AND gate |
| NAND-only gate count | 5 × 2-input NAND gates |
| ICs (XOR+AND method) | 7486 (XOR) + 7408 (AND) |
| ICs (NAND-only method) | 7400 (2 ICs, 5 gates used) |
| Limitation | No carry-in — use full adder for multi-bit chains |
Safety warnings
- Always power off the breadboard before rewiring — accidentally shorting a TTL output to GND while current flows can destroy the output driver and produce unpredictable results.
- Use the correct IC orientation (notch at pin 1): inserting the IC backwards applies reverse voltage and will permanently damage it within seconds.
Tools needed
- 7486 quad XOR gate IC
- 7408 quad AND gate IC
- Breadboard and jumper wires
- 5V DC power supply
- Two LEDs (different colours recommended) and two 470Ω resistors
- Two toggle switches and 10kΩ pull-down resistors
Common mistakes
- Using an OR gate instead of XOR for the Sum output: OR gives the wrong result for 1+1 (OR outputs 1, but the correct binary sum is 0 with a carry of 1).
- Swapping Sum and Carry outputs: Sum is the XOR output (lower weight), Carry is the AND output (higher weight). Swapping them produces inverted significance and wrong arithmetic.
- Forgetting that two inputs feed BOTH gates simultaneously: students sometimes wire A and B separately to each gate rather than sharing the same bus lines, which can cause skewed signal timing on breadboards.
- Trying to chain half adders for multi-bit addition: a half adder has no carry-in port, so chaining them directly is architecturally impossible. Use full adders for bit positions beyond the LSB.
Troubleshooting
- Sum LED stays off even for 0+1 input
- Cause: XOR gate not powered or Sum output pin miswired Fix: Check Vcc on pin 14 of the 7486. Verify pin 3 (not pin 6 or another gate's output) is connected to the Sum LED.
- Carry LED stays off even for 1+1 input
- Cause: AND gate output line not connected, or pull-down on output shorting the AND output LOW Fix: Probe pin 3 of the 7408 with a multimeter. Remove any resistor accidentally placed between the AND output and GND.
- Both LEDs light for 1+1 (should be only Carry)
- Cause: OR gate accidentally used instead of XOR for Sum Fix: Confirm the Sum gate IC is a 7486 (XOR), not a 7432 (OR). They have the same pinout but different logic functions.
Frequently asked questions
What is the truth table for a half adder circuit diagram?
The half adder has four input combinations: 0+0 gives S=0 C=0; 0+1 gives S=1 C=0; 1+0 gives S=1 C=0; 1+1 gives S=0 C=1. The Carry is 1 only when both inputs are 1.
What gates are used in a half adder circuit?
A half adder uses one XOR gate (for the Sum: S = A ⊕ B) and one AND gate (for the Carry: C = A · B). Both gates share the same two inputs.
What is the difference between a half adder and a full adder?
A half adder adds two 1-bit inputs and produces Sum and Carry out, but has no carry-in input. A full adder adds three 1-bit inputs (A, B, and Carry-in) and is required for all bit positions except the LSB in multi-bit addition.
How do you build a half adder using only NAND gates?
Use 5 NAND gates: G1=NAND(A,B)=P; G2=NAND(A,P); G3=NAND(B,P); G4=NAND(G2,G3)=Sum; G5=NAND(P,P)=Carry. Both Sum and Carry are derived from the single intermediate node P.
Which ICs are used to build a half adder?
The simplest IC half adder uses a 7486 (quad XOR) for Sum and a 7408 (quad AND) for Carry. For a NAND-only implementation, use the 7400 (quad NAND) — you need at least 5 gates, which spans two ICs.
Why is the half adder called 'half' an adder?
Because it only handles two inputs (A and B) but cannot accept a carry from a previous addition stage. A full adder handles three inputs (A, B, and Carry-in), completing the full addition capability.
Can you cascade half adders to add multi-bit numbers?
Not directly — cascading half adders does not work because each bit position beyond the LSB needs to accept a carry-in. You need to replace all positions except the first with full adders for correct multi-bit addition.