Full Subtractor Circuit Diagram: Truth Table, Boolean Equations & Gate Design
This is a free printable full subtractor circuit diagram: download the diagram as SVG or open it and print to paper or PDF.
A full subtractor is a combinational logic circuit that subtracts two single-bit numbers while also accounting for a borrow from a previous stage, producing a Difference bit and a Borrow-out bit. Its three inputs — minuend A, subtrahend B, and Borrow-in Bin — make it suitable for cascading into multi-bit binary subtractors. Understanding the full subtractor circuit diagram builds directly on half subtractor knowledge and is essential for ALU design.
The full subtractor extends the half subtractor by adding a third input: Borrow-in (Bin). This allows a chain of full subtractors to handle subtraction of arbitrarily wide binary numbers, with each stage passing its Borrow-out into the next stage's Borrow-in.
**Input/Output Definition** - Inputs: A (minuend), B (subtrahend), Bin (Borrow-in from the previous stage) - Outputs: D (Difference), Bout (Borrow-out)
**Boolean Equations**
Difference: D = A ⊕ B ⊕ Bin
Borrow-out: Bout = A'B + A'Bin + BBin = A'B + Bin(A ⊕ B)'
A simpler equivalent for Bout: Bout = A'B + A'Bin + BBin
This can also be factored as: Bout = (A ⊕ B)'·Bin + A'·B
**Gate-Level Construction**
The standard gate implementation uses two half subtractors plus an OR gate:
1. First half subtractor: inputs A and B → intermediate Difference D1 = A ⊕ B, intermediate Borrow B1 = A'B 2. Second half subtractor: inputs D1 and Bin → final Difference D = D1 ⊕ Bin = A ⊕ B ⊕ Bin, intermediate Borrow B2 = D1'·Bin 3. OR gate: Bout = B1 OR B2 = A'B + (A ⊕ B)'·Bin
Total gate count: 2× XOR, 2× AND (with inverted inputs), 1× OR gate. In terms of individual gate primitives: 2× XOR + 2× NOT + 2× AND + 1× OR.
**NAND-Only Implementation**
For NAND-only designs (common in TTL for economy), the full subtractor can be realised in approximately 9 NAND gates. This approach is used in PAL/GAL programmable logic devices where only NAND is available natively.
**Cascading Full Subtractors for Multi-Bit Subtraction**
To subtract two N-bit numbers, cascade N full subtractors: connect the Bout of each stage to the Bin of the next more-significant stage. For the LSB stage, set Bin = 0 (or use a half subtractor). For an 8-bit subtractor, you need 8 full subtractors. The final Bout indicates whether the result is negative (the subtrahend was larger than the minuend).
**Two's Complement Alternative**
In modern digital design, standalone subtractor chains are rare because adder–subtractor circuits using two's complement are more efficient. To subtract B from A: XOR each bit of B with a control line (set to 1 for subtraction), which inverts B; then feed inverted-B and A into an adder with carry-in = 1. This performs A + (~B) + 1 = A − B. The 74LS283 4-bit adder IC is commonly used in such configurations.
**Practical ICs**
Dedicated full subtractor ICs are uncommon in the 74-series library. Instead, the 74LS83/74LS283 4-bit binary adder combined with XOR gates (74LS86) to invert the subtrahend in two's complement mode is the standard industry approach.
Simulate your full subtractor circuit diagram in the free circuitdiagrammaker.com editor: place XOR, AND, NOT, and OR gates, wire all three inputs, and use interactive toggles to step through all eight truth table rows and verify Difference and Borrow-out for each combination.
How to wire full subtractor circuit diagram
- Understand the three inputs A is the minuend, B is the subtrahend, and Bin is the Borrow-in from the previous less-significant bit stage. For the LSB stage, tie Bin to GND (logic 0).
- Build the first half subtractor Connect A and B to a XOR gate (D1 = A ⊕ B) and to an AND gate with A inverted (B1 = A'B). This is identical to a standalone half subtractor circuit.
- Build the second half subtractor Feed D1 and Bin into a second XOR gate (final Difference D = D1 ⊕ Bin) and into a second AND gate with D1 inverted (B2 = D1'·Bin).
- Combine borrows with OR gate Feed B1 and B2 into an OR gate. Its output is Bout (Borrow-out). Only one of B1 or B2 can be HIGH at a time for valid single-bit subtraction, so OR gives the correct combined borrow.
- Connect LEDs for outputs Wire the D output through a 470Ω resistor to a green LED and Bout through 470Ω to a red LED for easy visual verification during breadboard testing.
- Verify all 8 truth table rows Using three toggle switches for A, B, and Bin, step through all eight input combinations and compare D and Bout against the truth table above. Pay particular attention to rows where Bout=1 confirming borrow propagation.
- Cascade for multi-bit subtraction Chain multiple full subtractor stages by connecting each stage's Bout to the next stage's Bin. An 8-bit subtractor requires 8 cascaded stages with Bin of the LSB stage tied to 0.
Specifications
| A=0, B=0, Bin=0 | D=0, Bout=0 |
|---|---|
| A=0, B=0, Bin=1 | D=1, Bout=1 |
| A=0, B=1, Bin=0 | D=1, Bout=1 |
| A=0, B=1, Bin=1 | D=0, Bout=1 |
| A=1, B=0, Bin=0 | D=1, Bout=0 |
| A=1, B=0, Bin=1 | D=0, Bout=0 |
| A=1, B=1, Bin=0 | D=0, Bout=0 |
| A=1, B=1, Bin=1 | D=1, Bout=1 |
| Difference equation | D = A ⊕ B ⊕ Bin |
| Borrow-out equation | Bout = A'B + A'Bin + BBin |
| Gates required | 2× XOR, 2× AND-NOT, 1× OR |
| Two-half-subtractor construction | HS1(A,B) → HS2(D1, Bin) → Bout = B1 OR B2 |
Safety warnings
- Ensure Borrow-in of the LSB stage is tied to GND through a 10kΩ resistor, not left floating — a floating input in CMOS logic can oscillate and produce unpredictable borrow propagation.
- When cascading multiple stages on a single breadboard, keep power rail continuity checked; a break in the Vcc rail can leave one stage unpowered while others appear to function normally.
Tools needed
- 74HC86 or 74LS86 quad XOR IC (2 gates needed)
- 74HC08 or 74LS08 quad AND IC (2 gates needed)
- 74HC04 or 74LS04 hex NOT/inverter IC
- 74HC32 or 74LS32 quad OR IC (1 gate needed)
- Breadboard, jumper wires, and 5V power supply
- Three toggle switches (A, B, Bin) with 10kΩ pull-down resistors and two indicator LEDs
Common mistakes
- Using OR instead of XOR for the Difference output: OR gives 1 for 1,1 but XOR gives 0, so 1−1=0 would incorrectly show 1. Always use XOR for Difference.
- Forgetting to invert A in the borrow AND gates: the borrow logic is A'B and A'Bin, not AB and ABin. Without the NOT on A, the borrow fires incorrectly when A=1.
- Omitting the OR gate to combine borrows: connecting only one half-subtractor borrow to the output gives an incomplete Borrow-out that misses some borrow conditions.
- Tying Borrow-in to Vcc (logic 1) for the LSB stage instead of GND: the LSB stage must have Bin=0 so the first subtraction starts without a phantom borrow.
Troubleshooting
- Borrow-out always 0 regardless of inputs
- Cause: OR gate output not connected to Bout, or OR gate power supply missing Fix: Probe the OR gate inputs (B1 and B2) to confirm at least one is HIGH for known-borrow cases like A=0,B=1,Bin=0. Then check OR gate Vcc pin.
- Difference is wrong for rows where Bin=1
- Cause: Borrow-in wire not connected to second XOR gate input Fix: Trace the Bin switch wire to confirm it reaches pin input of the second XOR gate, not the first.
- All outputs incorrect but wiring appears correct
- Cause: IC not powered: Vcc or GND missing from one of the ICs in the chain Fix: Verify Vcc and GND at every IC power pin with a multimeter before tracing signal lines.
- Cascade gives wrong result for multi-bit numbers
- Cause: Bout of one stage not connected to Bin of the next stage, or one stage has Bin floating Fix: Check each inter-stage Bout-to-Bin connection. Any floating input will behave unpredictably — add a 10kΩ pull-down if uncertain.
Frequently asked questions
What is the Boolean expression for a full subtractor?
Difference D = A ⊕ B ⊕ Bin. Borrow-out Bout = A'B + A'Bin + BBin. These can be simplified to D = A ⊕ B ⊕ Bin and Bout = A'(B + Bin) + BBin.
How many gates does a full subtractor require?
A full subtractor needs 2 XOR gates, 2 AND gates (each with one inverted input), and 1 OR gate — totalling 5 logic gate functions (7 if counting NOT gates separately).
What is the difference between a half subtractor and a full subtractor?
A half subtractor has 2 inputs (A, B) and no borrow-in, limiting it to single-bit LSB operations. A full subtractor has 3 inputs (A, B, Borrow-in) and can be cascaded for multi-bit subtraction.
How do you build a full subtractor from two half subtractors?
Connect A and B to the first half subtractor (gives D1 and B1). Feed D1 and Borrow-in to the second half subtractor (gives D = final Difference and B2). Then OR B1 and B2 to get the final Borrow-out.
What is the full subtractor truth table row count?
A full subtractor has 3 inputs, so there are 2³ = 8 rows in the truth table, covering all combinations of A, B, and Borrow-in (000 through 111).
Why is Borrow-out 1 for A=1, B=1, Bin=1?
Because 1 − 1 − 1 = −1, which in single-bit arithmetic means Difference=1 with a borrow. The binary result is: we need to borrow to compute this, giving D=1 (since 11 − 11 − 1 = 01 in 2-bit terms).
Can I simulate a full subtractor circuit online?
Yes. The circuitdiagrammaker.com free editor lets you build the gate-level schematic with XOR, AND, NOT, and OR gates and verify all 8 truth table rows interactively without any hardware.