Half Subtractor Circuit Diagram: Boolean Equations, Truth Table & IC Build
This is a free printable half subtractor circuit diagram: download the diagram as SVG or open it and print to paper or PDF.
A half subtractor computes the difference and borrow of two single-bit binary numbers A and B, where A is the minuend and B is the subtrahend. The outputs are Difference D = A ⊕ B (XOR) and Borrow Bout = A'B (NOT A AND B). Like the half adder, it has no borrow-in input — that is handled by the full subtractor.
The half subtractor performs the binary operation A − B for single-bit inputs. It produces two outputs: Difference (D) and Borrow (Bout). The borrow indicates that B was larger than A, requiring borrowing from the next higher bit position.
Boolean equations: D = A ⊕ B and Bout = A'B. Note that Bout is NOT symmetric: it is 1 only when A=0 and B=1 (i.e. 0−1, which requires a borrow). This differs from the half adder's carry which is symmetric (AB).
Truth table: - A=0, B=0 → D=0, Bout=0 (0−0=0, no borrow) - A=0, B=1 → D=1, Bout=1 (0−1=−1 in decimal, but in binary: Difference=1 with Borrow=1, meaning the result is actually 1 in the current bit with a borrow of 1 from the next position) - A=1, B=0 → D=1, Bout=0 (1−0=1, no borrow) - A=1, B=1 → D=0, Bout=0 (1−1=0, no borrow)
Gate-level schematic: the half subtractor requires three gates: one XOR gate (Difference = A ⊕ B), one NOT gate (to compute A'), and one AND gate (Borrow = A' · B). The circuit topology is: inputs A and B feed the XOR gate to produce D; input A feeds a NOT gate to produce A'; then A' and B feed an AND gate to produce Bout.
Component count: 1 XOR + 1 NOT + 1 AND gate. Using TTL ICs, this maps to: one gate from a 7486 (XOR), one gate from a 7404 (NOT), and one gate from a 7408 (AND). Alternatively, a NAND-only half subtractor uses the same 5-NAND XOR structure for D, plus two extra NAND gates to implement A' AND B for Bout: since A'B = NAND(A, NAND(A,B)) — wait, more precisely: Bout = A'B = NOT(NAND(NOT A, B)) which is 4 gates. The full NAND-only implementation uses 6 NAND gates.
Comparison with half adder: the half adder and half subtractor produce the same Difference/Sum output (both A ⊕ B), but differ in the second output: the adder carry is AB (symmetric) while the subtractor borrow is A'B (asymmetric). This means the circuits share the XOR gate but use different second-output logic.
Cascading to a full subtractor: just as two half adders plus an OR gate form a full adder, two half subtractors plus an OR gate form a full subtractor. The full subtractor handles a borrow-in from the previous bit position.
Practical application: subtractors are rarely implemented as standalone circuits in modern digital design. Instead, two's-complement arithmetic uses an adder with a controlled inversion: to subtract B from A, invert all bits of B (using XOR gates with a control line set to 1) and add 1 (by setting carry-in to 1), then add A. This adder–subtractor circuit is built around a full adder chain, making a separate subtractor circuit mostly pedagogical.
However, studying the half subtractor is important because it reinforces Boolean equation derivation, introduces the concept of asymmetric logic (Borrow ≠ A AND B), and demonstrates how truth tables differ from the adder even when the same gates appear.
Build the half subtractor in the Circuit Diagram Maker free online editor: connect an XOR gate for Difference and an AND gate with an inverted A-input for Borrow — you'll see exactly why B > A forces a borrow while A ≥ B does not.
How to wire half subtractor circuit diagram
- Gather components Obtain a 7486 (XOR), 7404 (NOT), and 7408 (AND) IC, a breadboard, 5V supply, two toggle switches (A and B), two LEDs (Difference and Borrow), and appropriate resistors.
- Power all three ICs Insert each IC into the breadboard. Connect pin 14 to +5V and pin 7 to GND on each IC. Place 100nF decoupling capacitors on each power supply connection.
- Wire XOR gate for Difference Connect input A to pin 1 of the 7486 and input B to pin 2. The Difference output D appears at pin 3. Connect pin 3 through a 470Ω resistor to the Difference LED.
- Invert A for Borrow logic Connect input A to pin 1 of the 7404 (NOT gate). The inverted signal A' appears at pin 2 of the 7404.
- Wire AND gate for Borrow Connect A' (7404 pin 2) to pin 1 of the 7408 AND gate and connect input B to pin 2 of the 7408. The Borrow output Bout appears at pin 3 of the 7408. Connect via 470Ω to the Borrow LED.
- Test all four combinations A=0,B=0: both LEDs off. A=0,B=1: D LED on, Borrow LED on (borrow required). A=1,B=0: D LED on, Borrow off. A=1,B=1: both LEDs off (1-1=0, no borrow).
- Verify borrow asymmetry Notice that Borrow is only 1 when A=0 and B=1. Swap A and B (B=0, A=1): Borrow is now 0. This confirms Bout = A'B is not symmetric — the subtractor knows which input is the minuend.
Specifications
| A=0, B=0 → D, Bout | D=0, Bout=0 |
|---|---|
| A=0, B=1 → D, Bout | D=1, Bout=1 |
| A=1, B=0 → D, Bout | D=1, Bout=0 |
| A=1, B=1 → D, Bout | D=0, Bout=0 |
| Difference equation | D = A ⊕ B |
| Borrow equation | Bout = A'B (NOT A AND B) |
| Gates required | 1 XOR + 1 NOT + 1 AND |
| ICs used | 7486 (XOR) + 7404 (NOT) + 7408 (AND) |
| Borrow occurs when | A=0 and B=1 (B > A) |
| Symmetry of outputs | D is symmetric (A⊕B=B⊕A); Bout is asymmetric (A'B ≠ AB') |
Safety warnings
- Three ICs on one breadboard share a common power bus — ensure the +5V and GND rails are continuous across the full length of the board and rated for the combined supply current.
- Avoid connecting any input or output pin directly to the supply rails without a current-limiting resistor; accidental shorts during probing with a multimeter can damage IC output stages.
Tools needed
- 7486 quad XOR gate IC
- 7404 hex NOT gate IC
- 7408 quad AND gate IC
- Breadboard and jumper wires
- 5V DC power supply
- Two LEDs (Difference and Borrow) with 470Ω resistors
- Two toggle switches with 10kΩ pull-down resistors
Common mistakes
- Using AB (AND of A and B) instead of A'B for the borrow: forgetting to invert A gives the wrong borrow — it would be 1 for 1,1 instead of 0,1. Always include the NOT gate on the A input.
- Confusing A (minuend) and B (subtrahend) inputs: if you swap A and B in the Borrow gate, you compute B'A instead of A'B, which inverts the sense of the borrow. Keep track of which input is the minuend.
- Assuming the subtractor and adder are the same circuit: the Difference and Sum both use XOR, leading students to incorrectly use an AND for the borrow (copying the adder's carry logic).
- Not connecting the NOT gate's input to the AND gate: students sometimes invert A for a visual check but forget to wire A' into the AND gate, leaving the AND gate with two un-inverted inputs and getting carry (AB) instead of borrow (A'B).
Troubleshooting
- Borrow LED on for A=1, B=1 input (should be off)
- Cause: AND gate inputs receiving A and B directly instead of A' and B Fix: Verify that pin 1 of the 7408 AND gate is connected to the NOT gate output (A'), not directly to the A switch.
- Difference and Borrow both off for A=0, B=1 (should both be on)
- Cause: 7404 NOT gate not powered or NOT output wire disconnected Fix: Check Vcc and GND on the 7404. Probe pin 2 (NOT output) — it should be HIGH when pin 1 is LOW (A=0).
- Intermittent Borrow output
- Cause: Loose jumper on A-to-NOT-gate connection causing A to float intermittently Fix: Reseat the jumper from the A switch to pin 1 of the 7404. Press the jumper firmly into the breadboard and add a pull-down resistor on the A line.
Frequently asked questions
What is the truth table for a half subtractor circuit diagram?
Four rows: A=0,B=0 → D=0,Bout=0; A=0,B=1 → D=1,Bout=1; A=1,B=0 → D=1,Bout=0; A=1,B=1 → D=0,Bout=0. Borrow is 1 only in the second row.
What is the Boolean expression for a half subtractor?
Difference D = A ⊕ B (XOR). Borrow Bout = A'B (NOT A, AND B). The borrow is asymmetric — it is HIGH only when A is 0 and B is 1.
What gates are used in a half subtractor circuit?
A half subtractor uses one XOR gate (for Difference), one NOT gate (to invert A), and one AND gate (for Borrow = A' AND B). Three gates total from three different ICs: 7486, 7404, 7408.
What is the difference between a half adder and a half subtractor?
Both use XOR for their primary output (Sum/Difference = A ⊕ B). The difference is the secondary output: the adder's Carry = AB (symmetric AND), while the subtractor's Borrow = A'B (requires an inverter on A — asymmetric).
What is the difference between a half subtractor and a full subtractor?
A half subtractor takes two inputs (A, B) with no borrow-in. A full subtractor takes three inputs (A, B, Borrow-in) to handle borrows propagating from the previous bit position, enabling multi-bit subtraction.
Why is the half subtractor borrow equation A'B and not AB?
Because borrowing occurs only when the minuend (A) is smaller than the subtrahend (B), i.e. A=0 and B=1. When A=1 and B=1 (1−1=0), no borrow is needed. The NOT on A ensures Bout is 1 only in the A<B case.
Can you build a half subtractor using only NAND gates?
Yes. Use the 5-NAND XOR construction for D, plus a NOT (1 NAND tied) on A and a NAND-as-AND for A'B followed by an inversion, totalling about 7 NAND gates for the complete half subtractor.