NOT Gate Circuit Diagram: Inverter Logic, Truth Table & IC Realisation
This is a free printable not gate circuit diagram: download the diagram as SVG or open it and print to paper or PDF.
A NOT gate (inverter) is the simplest logic gate — it has one input and one output, and the output is always the complement of the input. If the input is HIGH (1) the output is LOW (0), and vice versa. Expressed in Boolean algebra: Y = A' (or Ā). Inverters are fundamental building blocks used in every digital system to complement signals and enable universal NAND/NOR constructions.
The NOT gate performs logical negation or complementation. Its Boolean expression Y = A' (also written Ā, NOT A, or ~A) states that the output is the logical inverse of the input. This single-input gate is the simplest possible logic function.
Truth table: when input A=0 the output Y=1; when A=1 the output Y=0. Two rows, two complementary states — that is the complete behaviour of an inverter.
Logic symbol: the NOT gate is drawn as a triangle pointing toward the output, with a small circle (bubble) at the output tip. The triangle represents a buffer and the bubble represents inversion. When a bubble appears on the input of another gate symbol, it means that input is active-LOW — the same inversion concept.
Single-transistor NPN inverter: the simplest transistor inverter uses one NPN BJT (e.g. 2N2222 or BC547). Connect a pull-up resistor R_C (4.7kΩ) from Vcc (+5V) to the collector. Connect the emitter directly to GND. Drive the base through a base resistor R_B (10kΩ–100kΩ) from the input. Take the output at the collector. When the input is LOW (0V), the transistor is cut off, the collector is pulled to Vcc through R_C, and the output is HIGH. When the input is HIGH (≥0.7V), the transistor saturates (turns fully on), pulling the collector to near 0V (V_CE_sat ≈ 0.2V), so the output is LOW. This is a straightforward common-emitter inverter.
For CMOS inverter construction: a PMOS transistor has its gate and drain tied to the input and output respectively, and its source tied to Vcc. An NMOS transistor is connected with gate and drain at the same nodes, source to GND. This complementary MOS push-pull stage is the basis of the CMOS inverter found in every digital chip. When input is LOW: PMOS on, NMOS off → output HIGH. When input is HIGH: PMOS off, NMOS on → output LOW. No static current flows except during switching transients, making CMOS inverters extremely power-efficient.
Integrated circuit: the standard TTL hex inverter is the 7404 (or 74LS04), containing six independent single-input inverters in a 14-pin DIP. Pin assignments: inverter 1 uses input pin 1 and output pin 2; inverter 2 uses pins 3 (input) and 4 (output); inverter 3 uses pins 5 (input) and 6 (output); inverter 4 uses pins 9 (input) and 8 (output); inverter 5 uses pins 11 (input) and 10 (output); inverter 6 uses pins 13 (input) and 12 (output). Vcc is pin 14; GND is pin 7. The CMOS equivalent is the 74HC04 or CD4069UB.
Applications: inverters are used to: (1) complement a signal (active-HIGH to active-LOW); (2) drive bus lines in opposite phase for differential signalling; (3) build edge-triggered oscillators (a chain of an odd number of inverters forms a ring oscillator); (4) synthesise other gates — two inverters plus a NAND give AND; (5) implement De Morgan-equivalent conversions in logic networks. A NOT gate is also the simplest component of a negative-feedback loop used to build SR latches from NAND or NOR gates.
Build and test your inverter in the Circuit Diagram Maker free online editor — drag a NOT gate symbol onto the canvas, attach a logic switch and an LED, click simulate, and watch the output invert every time you toggle the input.
How to wire not gate circuit diagram
- Choose your approach Either use a 7404 IC for a clean single-chip inverter, or build a discrete transistor inverter using an NPN BJT (2N2222 / BC547) to understand the underlying circuit.
- IC method — power the 7404 Insert the 7404 into a breadboard. Connect pin 14 to +5V and pin 7 to GND. Place a 100nF decoupling capacitor between Vcc and GND close to the IC.
- Connect the input Wire a push-button switch between +5V and pin 1 (input 1A), with a 10kΩ pull-down resistor from pin 1 to GND to default the input LOW.
- Connect the output LED Connect pin 2 (output 1Y) through a 470Ω resistor to the LED anode; LED cathode to GND. The LED should be ON at power-up (output HIGH when input LOW).
- Test inversion Press the button (input goes HIGH): the LED should extinguish. Release the button (input LOW): the LED should illuminate. This confirms NOT-gate operation.
- Discrete BJT inverter (optional) On a separate breadboard area, connect R_C (4.7kΩ) from +5V to the collector of a 2N2222, emitter to GND, and a 47kΩ base resistor from the input signal to the base. Take the output at the collector.
- Measure switching threshold Slowly increase input voltage from 0V using a potentiometer and note the input voltage at which the output transitions from HIGH to LOW. For TTL this is near 1.5V.
Specifications
| A=0 | Y=1 |
|---|---|
| A=1 | Y=0 |
| Boolean expression | Y = A' (Ā, NOT A) |
| TTL IC | 7404 / 74LS04 (hex inverter) |
| CMOS IC | 74HC04 / CD4069UB |
| Number of gates per package | 6 (hex) |
| Supply voltage (TTL) | 5V ±5% |
| Supply voltage (74HC) | 2V – 6V |
| Propagation delay (74LS04) | 10 ns typical |
| Collector resistor R_C (BJT inverter) | 4.7kΩ typical |
| Base resistor R_B (BJT inverter) | 10kΩ – 100kΩ |
Safety warnings
- Never connect the output of a TTL inverter directly to another logic supply rail — even a momentary short during a logic transition can permanently damage the output driver transistors.
- Keep inputs protected: unused 7404 inputs must not be left floating, as noise pickup can cause oscillation and excessive power dissipation that shortens IC life.
Tools needed
- 7404 or 74LS04 hex inverter IC (or 2N2222 NPN transistor for discrete build)
- Breadboard and jumper wires
- 5V DC power supply
- Digital multimeter
- LED and 470Ω resistor
- 10kΩ pull-down and 47kΩ base resistors
Common mistakes
- Connecting the output of two inverters back-to-back and expecting oscillation at DC: a two-inverter loop is a bistable latch, not an oscillator. Ring oscillators require an odd number (3, 5, 7...) of inverters.
- Using the 7404 output to directly drive a high-current LED without a current-limiting resistor: TTL outputs can source/sink only 8–16mA. Always use a series resistor (470Ω for 5V supply).
- Omitting the base resistor in a discrete transistor inverter: driving the base directly from 5V saturates the transistor hard, causing excessive base current and possible damage to the transistor.
- Confusing active-LOW and active-HIGH signals: a bubble on a pin symbol means active-LOW. Failing to invert signals correctly when connecting active-LOW outputs to active-HIGH inputs causes logic errors throughout the design.
Troubleshooting
- Output stays HIGH regardless of input
- Cause: Input pin floating (not driven to a definite logic level) Fix: Add a 10kΩ pull-down resistor from the input pin to GND so the default state is a clean LOW.
- Output stays LOW regardless of input
- Cause: Vcc not connected, or output shorted to GND Fix: Measure Vcc on pin 14. Check for solder bridges or wire shorts on the output net.
- Transistor inverter output not reaching full Vcc when input is LOW
- Cause: Pull-up resistor R_C value too large combined with leakage current Fix: Reduce R_C to 4.7kΩ or lower to ensure enough pull-up current to charge the output node to Vcc minus leakage drops.
Frequently asked questions
What is the truth table for a NOT gate circuit diagram?
The NOT gate has only two rows: input A=0 gives output Y=1, and input A=1 gives output Y=0. It always outputs the complement of the input.
Which IC is used for a NOT gate (inverter)?
The 7404 (or 74LS04) is the standard TTL hex inverter IC, containing six inverters in a 14-pin DIP. The CMOS version is the 74HC04 or CD4069UB.
How do you build a NOT gate from a single transistor?
Use an NPN BJT in common-emitter configuration: pull-up resistor from Vcc to collector, emitter to GND, input via base resistor. Output (collector) is HIGH when input is LOW and LOW when input is HIGH.
What is the Boolean expression for a NOT gate?
Y = A' or equivalently Ā (A-bar). Both notations mean 'Y is the logical complement of A.'
Why is a NOT gate called an inverter?
Because it inverts or flips the logic level of its input — HIGH becomes LOW and LOW becomes HIGH — just like a mathematical negation or electrical signal inversion.
Can a NOT gate be made from a NAND gate?
Yes. Tie both inputs of a 2-input NAND gate together. The output is then the NAND of A with itself, which equals NOT A: Y = (A NAND A) = A'.
How many inverters are in a 7404 IC?
The 7404 contains six independent inverters (hence 'hex inverter') in a 14-pin DIP, with shared Vcc (pin 14) and GND (pin 7) and six input-output pairs on the remaining pins.