Multiplexer 4:1 Symbol

Multiplexer 4:1 symbol4:1 MUX
The Multiplexer 4:1 symbol (IEC 60617 / ANSI Y32.2).

Definition: The Multiplexer 4:1 symbol represents a four-input, one-output digital data selector circuit — commonly implemented by the 74HC153 — that connects one of four data inputs (I0, I1, I2, I3) to the single output (Out) based on a 2-bit select address (S1:S0), as defined in IEC 60617-12 and ANSI/IEEE 91-1984 for binary logic elements.

Also known as: 4-to-1 MUX, 4:1 data selector, 74HC153, 74LS153, quad 2:1 MUX combined, 4-input multiplexer.

What the Multiplexer 4:1 symbol means

The Multiplexer 4:1 symbol specifically represents a four-input multiplexer, the most common MUX configuration in TTL and CMOS logic families. The 2-bit select input (S1:S0) can address four states (00, 01, 10, 11), routing input I0, I1, I2, or I3 respectively to the Out terminal. The 74HC153 is a dual 4:1 MUX in a 16-pin DIP that implements two independent 4:1 MUX channels sharing select inputs.

The 4:1 MUX symbol communicates that the block replaces four separate signal paths with a single shared output path, controlled by two address bits. In digital system design, 4:1 MUX arrays implement complex logic functions, address decoding, and signal routing with minimal gate count.

How to identify the Multiplexer 4:1 symbol

The Multiplexer 4:1 symbol is drawn as a rectangle labelled 'MUX 4:1' or as a trapezoid (wider side with four inputs, narrowing to the output side). Four input pins enter from the left: I0, I1, I2, and I3 at evenly spaced vertical positions. The single Out pin exits from the right. The select input S1:S0 enters from the bottom as a 2-bit bus. The '4:1' annotation or four visible input lines clearly distinguish this symbol from a 2:1 or 8:1 MUX.

Function in a circuit

The 4:1 multiplexer routes one of four data inputs to the output based on the 2-bit select address: S1=0,S0=0 → Out=I0; S1=0,S0=1 → Out=I1; S1=1,S0=0 → Out=I2; S1=1,S0=1 → Out=I3. The 74HC153 dual 4:1 MUX also features an active-low enable input (E̅) that forces the output low when asserted, allowing multiple MUX outputs to be wire-ORed for bus expansion. Propagation delay for 74HC153 at 5 V is approximately 7 ns.

Standards: IEC vs ANSI

IEC 60617IEC 60617-12 defines the 4:1 MUX as a rectangle with 'MUX' qualifying symbol and four input lines, a select input, and one output. The selection function can be described using IEC dependency notation with V (or EN) labels on control inputs.
ANSI/IEEE 315ANSI/IEEE 91-1984 uses the trapezoid distinctive shape for a 4:1 MUX with four inputs on the wide side, the output on the narrow end, and select inputs entering at the bottom. The 74HC153 datasheet uses ANSI/IEEE 91-1984 logic symbols.
Key differenceIEC 60617-12 uses a labelled rectangle with 'MUX 4:1'; ANSI/IEEE 91-1984 uses a trapezoid with four input lines on the wide end and the output at the narrow end. Both have S1:S0 select inputs entering from the bottom. The trapezoid vs. rectangle is the sole visual difference.

Terminals / pins

PinName
i0I0
i1I1
i2I2
i3I3
outOut
selS1:S0

Typical values

74HC153: supply voltage 2–6 V; propagation delay 7 ns (at 5 V); output current ±25 mA; input capacitance 4 pF; select lines: 2 (S0, S1); enable (active-low): 1 per channel; package: 16-pin DIP or SOIC.

Where the Multiplexer 4:1 symbol is used

Example

In a 4-channel temperature monitoring system, the Multiplexer 4:1 symbol (I0 = thermocouple 1, I1 = thermocouple 2, I2 = thermocouple 3, I3 = thermocouple 4; Out to ADC input; S1:S0 driven by two Arduino GPIO pins) allows a single ADC to read four thermocouple voltage signals by cycling S1:S0 through 00, 01, 10, 11 at 100 ms intervals, reading one thermocouple per cycle.

Key facts

Frequently asked questions

What does the 4:1 multiplexer symbol mean?

The 4:1 multiplexer symbol means the block selects one of four data inputs (I0–I3) and routes it to a single output (Out) based on a 2-bit select address (S1:S0). It is a four-input, one-output electronically controlled switch.

What does the 4:1 MUX symbol look like?

The 4:1 MUX symbol is a trapezoid (ANSI/IEEE 91) or rectangle (IEC 60617) with four input lines (I0, I1, I2, I3) on the left, one output (Out) on the right, and a 2-bit select input (S1:S0) entering from the bottom. The four input lines and '4:1' label distinguish it from 2:1 or 8:1 MUX symbols.

How many select lines does a 4:1 MUX have?

A 4:1 MUX has 2 select lines (S0 and S1). Two binary select lines provide four address combinations (00, 01, 10, 11) to select from four inputs. In schematic diagrams, the select input is typically drawn as a 2-bit bus labelled S1:S0.

What is the truth table for a 4:1 MUX?

The 4:1 MUX truth table: S1=0,S0=0 → Out=I0; S1=0,S0=1 → Out=I1; S1=1,S0=0 → Out=I2; S1=1,S0=1 → Out=I3. The output equals the data at the selected input, regardless of the other three input values.

What IC implements a 4:1 multiplexer?

The 74HC153 is a dual 4-to-1 data selector/multiplexer IC that contains two independent 4:1 MUX channels sharing select inputs. The 74LS153 is the older TTL equivalent. Both are 16-pin ICs represented by the 4:1 MUX symbol in logic diagrams.

What is the difference between a 4:1 MUX and an 8:1 MUX?

A 4:1 MUX has 4 data inputs and 2 select lines; an 8:1 MUX has 8 data inputs and 3 select lines. The 8:1 MUX doubles the number of selectable inputs but requires one additional select bit. The 74HC151 is a common 8:1 MUX IC.

What IEC standard defines the 4:1 multiplexer symbol?

The 4:1 multiplexer symbol is defined in IEC 60617-12 (binary logic elements). The qualifying symbol 'MUX' with four input lines inside a rectangle identifies the 4:1 configuration. The equivalent ANSI reference is IEEE 91-1984 (IEEE Standard for Logic Symbols for Digital Logic).

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