Encoder (Priority) Symbol
Definition: The Encoder (Priority) symbol represents a combinational logic block that converts 2^n input lines into an n-bit binary code output, with priority encoding ensuring the highest-numbered active input determines the output when multiple inputs are simultaneously asserted, as defined in IEEE 315-1975 / ANSI Y32.2 and depicted as a rectangular logic block with input lines I0–I3 (or more) on the left and binary output lines A0–A2 on the right.
Also known as: priority encoder, 8-to-3 encoder, 4-to-2 encoder, binary encoder, input priority encoder, digital encoder block.
What the Encoder (Priority) symbol means
The Encoder (Priority) symbol denotes a digital logic component that accepts multiple one-hot or active-high input lines and produces a compact binary code identifying which input is active. When multiple inputs are asserted simultaneously, a priority encoder gives precedence to the highest-numbered input, ensuring an unambiguous output at all times. The output binary code represents the index of the highest-priority active input.
In logic diagrams and system schematics, the priority encoder block appears wherever multiple interrupt sources, sensor inputs, or push-button inputs must be encoded into a binary address for a microcontroller, multiplexer, or bus interface. The IEEE 315-1975 standard rectangular logic symbol with input pins on the left and output pins on the right is the universal representation for this function.
How to identify the Encoder (Priority) symbol
The Encoder (Priority) block symbol is drawn as a rectangle with the label 'PRIORITY ENCODER' or 'ENC' inside. Input pins I0, I1, I2, I3 (and higher for larger encoders) connect on the left side. Output pins A0, A1, A2 connect on the right side, representing the binary-coded output. Some symbols include an Enable Input (EI) pin and an Enable Output (EO) or Group Signal (GS) pin for cascading multiple encoder ICs. The IEEE 315-1975 logic block convention uses a plain rectangle for combinational functions.
Function in a circuit
The priority encoder examines all input lines simultaneously and produces a binary output code equal to the index of the highest-priority (highest-numbered) active input. For a 4-to-2 priority encoder with inputs I0–I3: if I3 is asserted the output is A1A0 = 11 (binary 3); if only I2 is asserted the output is 10 (binary 2). The encoder ignores lower-priority inputs when a higher one is active. This prioritisation prevents output ambiguity and is essential in interrupt controller design, where only one interrupt address is dispatched at a time even if multiple interrupts are pending simultaneously.
Standards: IEC vs ANSI
| IEC 60617 | IEC 60617 does not define a specific encoder block symbol; digital logic functions are represented using IEC 617-12 (binary logic elements), where combinational blocks are rectangular with dependency notation. A priority encoder may be shown using the 'P' (priority) dependency qualifier inside the block. |
|---|---|
| ANSI/IEEE 315 | IEEE 315-1975 / ANSI Y32.2 represents combinational logic blocks as plain rectangles with labelled input and output pins. A priority encoder is labelled 'PRIORITY ENCODER' or by its function (e.g. '74148' for the common 8-to-3 TTL priority encoder IC). Pin labels follow the device datasheet. |
| Key difference | IEC 617-12 uses dependency notation (letters inside the block to show logical relationships), which is more compact and technology-independent. ANSI/IEEE 315 uses a simpler plain rectangle with explicit pin labels. US and Japanese datasheets typically follow ANSI/IEEE; European and international documentation follows IEC. |
Terminals / pins
| Pin | Name |
|---|---|
| i0 | I0 |
| i1 | I1 |
| i2 | I2 |
| i3 | I3 |
| a0 | A0 |
| a1 | A1 |
| a2 | A2 |
Typical values
Standard configurations: 4-to-2 (4 inputs, 2-bit output), 8-to-3 (8 inputs, 3-bit output), 16-to-4 (16 inputs, 4-bit output). Common ICs: 74HC148 (8-to-3 priority encoder, active-low inputs/outputs), 74HC147 (10-to-4 BCD priority encoder). Supply voltage: 2–6 V (74HC series), 4.5–5.5 V (74LS series). Propagation delay: 10–20 ns typical (74HC at 5 V, 25 °C).
Where the Encoder (Priority) symbol is used
- Interrupt priority controllers in microprocessor systems: encodes simultaneous interrupt requests into a binary vector code for the CPU interrupt acknowledge cycle
- Keyboard and keypad scanning circuits: encodes which key is pressed into a binary code delivered to a microcontroller GPIO or bus interface
- Address generation for memory multiplexer trees: priority encoders select which of multiple bus masters receives access to a shared bus or memory
- ADC input selection: priority encoders select the highest-priority analogue channel in multi-channel data acquisition systems with simultaneous trigger events
- FPGA and CPLD internal logic where LUT-based priority encoders resolve simultaneous enable signals in state-machine designs
- Fault annunciator panels: encodes multiple alarm inputs into a priority-ordered fault code for display or logging systems
Example
In an 8-input interrupt controller built around a 74HC148, the eight interrupt-request lines connect to the encoder inputs I0–I7 (active-low). When interrupt sources I2 and I5 are asserted simultaneously, the priority encoder outputs the binary code for I5 (the highest priority), producing A2A1A0 = 101 (binary 5) on the output lines. The GS output asserts to indicate that at least one input is active, and the CPU reads the 3-bit code to vector to interrupt service routine 5.
Key facts
- The Encoder (Priority) block converts multiple input lines into a compact binary code; a 4-input priority encoder produces a 2-bit output (I0–I3 → A0–A1), and an 8-input encoder produces a 3-bit output (I0–I7 → A0–A2).
- Priority encoding means the highest-numbered active input wins: if I3 and I1 are both asserted, the output is binary 3 (A1A0=11), ignoring I1. This ensures an unambiguous output with no glitching.
- The block symbol pins are: inputs I0 (x=0,y=15), I1 (x=0,y=25), I2 (x=0,y=35), I3 (x=0,y=45) on the left; outputs A0 (x=60,y=20), A1 (x=60,y=30), A2 (x=60,y=40) on the right, representing the binary-encoded address.
- The 74HC148 (8-to-3 priority encoder) and 74HC147 (10-to-4 BCD) are the most widely used TTL/CMOS encoder ICs; both use active-low inputs and active-low outputs and can be cascaded using EI/EO pins.
- A priority encoder is the logical inverse of a decoder: a decoder takes an n-bit binary input and asserts one of 2^n outputs; an encoder takes up to 2^n inputs and produces an n-bit binary output.
- IEEE 315-1975 represents the priority encoder as a plain rectangle with labelled I and A pins; IEC 617-12 uses dependency notation with a 'P' qualifier to indicate priority logic inside the block.
- Priority encoders are used in FPGA synthesis where the Verilog/VHDL 'casex' or 'priority case' constructs infer priority encoder logic automatically from if-else or case statements.
Frequently asked questions
What does the encoder block symbol mean in a logic diagram?
The encoder block symbol represents a combinational logic component that converts one-hot or multiple-active input lines into a compact binary code. A priority encoder outputs the binary index of the highest-priority (highest-numbered) active input, ensuring an unambiguous output even when multiple inputs are simultaneously asserted.
What does a priority encoder block look like in a schematic?
A priority encoder block is drawn as a rectangle labelled 'PRIORITY ENCODER' or 'ENC' with input pins (I0, I1, I2, I3...) on the left side and binary output pins (A0, A1, A2) on the right side. Additional control pins such as Enable Input (EI) and Enable Output (EO) may appear on the top and bottom.
What is the difference between an encoder and a decoder in digital logic?
An encoder takes multiple input lines (up to 2^n) and produces an n-bit binary output code identifying which input is active. A decoder takes an n-bit binary input and asserts one of 2^n output lines corresponding to the input value. They perform inverse operations: the encoder compresses information, the decoder expands it.
What is a priority encoder and why is priority needed?
A priority encoder assigns a precedence order to its inputs; when two or more inputs are simultaneously active, the output represents the highest-numbered (highest-priority) active input. Without priority, simultaneous inputs would produce an undefined or incorrect binary code. Priority encoding is essential in interrupt controllers where only one interrupt address can be dispatched at a time.
What standard defines the encoder block symbol?
IEEE 315-1975 / ANSI Y32.2 represents digital encoder blocks as plain rectangles with labelled input and output pins. IEC 617-12 uses dependency notation inside the rectangle to describe the logical function. Both standards are used in digital logic schematics, with ANSI/IEEE prevailing in North American and Japanese datasheets.
How many pins does a priority encoder block have?
A basic 4-to-2 priority encoder block has 4 input pins (I0–I3) and 2 output pins (A0–A1), totalling 6 functional pins. An 8-to-3 encoder (such as the 74HC148) has 8 input pins and 3 output pins, plus optional Enable Input (EI) and Enable Output (EO) control pins for cascading, giving up to 13 pins in total.
What is the most common priority encoder IC?
The 74HC148 is the most widely used 8-to-3 priority encoder IC. It accepts 8 active-low input lines (I0–I7) and produces a 3-bit active-low binary output (A0–A2), with active-low EI (enable input), EO (enable output), and GS (group signal) pins for daisy-chaining multiple devices to expand the input count.
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