Demultiplexer (DEMUX) Symbol
Definition: The Demultiplexer (DEMUX) symbol represents a combinational logic functional block that routes a single data input to one of several outputs selected by binary address inputs, acting as a one-to-many switching element in digital circuits, defined per IEEE Std 91-1984 / IEC 60617-12.
Also known as: DEMUX, data distributor, demultiplexer, one-to-many switch, 1-to-N switch.
What the Demultiplexer (DEMUX) symbol means
The Demultiplexer symbol denotes a digital routing element that connects one data source to one of N output channels based on the binary state of its selection (address) inputs. With a k-bit select input, the DEMUX has 2^k output channels. At any clock cycle, only the selected output mirrors the data input; all other outputs remain at their inactive state (logic 0 or high-impedance, depending on implementation).
In circuit diagrams the DEMUX symbol appears wherever a single signal must be distributed to one of several destinations under programmatic control—for example routing a shared data bus to one of several destination registers, or distributing a modulated signal in a frequency-division-multiplex system to individual demodulator channels.
How to identify the Demultiplexer (DEMUX) symbol
The Demultiplexer symbol is a labelled rectangle inscribed 'DEMUX' or 'MUX-1:N'. On the left side are one data input pin (In) and one or more selection pins (Sel or S0, S1…). On the right side are multiple output pins (O0, O1, O2…) corresponding to the N output channels. The funnel or trapezoid shape is sometimes used to represent a DEMUX (widening from input to outputs), distinguishing it visually from a MUX (which narrows from inputs to output).
Function in a circuit
A demultiplexer routes the logic level on the In pin to exactly one output Ox, where x is the binary value of the Sel input. All other outputs remain at logic 0 (or their inactive state). With a 1-bit Sel input the DEMUX selects between O0 and O1; with a 2-bit Sel it selects among O0–O3; with a 3-bit Sel it selects among O0–O7. DEMUX circuits are used in TDM (Time-Division Multiplexing) receivers to separate interleaved data streams and in address decoder circuits (a decoder is functionally equivalent to a DEMUX with the data input tied to the enable).
Standards: IEC vs ANSI
| IEC 60617 | IEC 60617-12 defines the DEMUX as a labelled functional block, sometimes using a trapezoid shape with the wide end on the output side, with an 'MUX' or 'DEMUX' label and a selection input marked with an arrow or 'G' (general qualifier). |
|---|---|
| ANSI/IEEE 315 | IEEE Std 91-1984 / ANSI Y32.14 defines the demultiplexer using a rectangular or trapezoidal block with selection inputs. The distinctive trapezoid shape (wide side = multiple outputs) is an IEEE 91 convention for indicating the expanding (one-to-many) routing function. |
| Key difference | IEC 60617-12 and IEEE 91 both support the labelled rectangle for DEMUX blocks. IEEE 91 more commonly uses the trapezoidal body with the wide side on the output (multiple outputs) side to distinguish the DEMUX from the MUX (which has the wide side on the input side); IEC practice is more varied. |
Terminals / pins
| Pin | Name |
|---|---|
| in | In |
| o0 | O0 |
| o1 | O1 |
| o2 | O2 |
| sel | Sel |
Typical values
Common sizes: 1:2 (1 data in, 2 out, 1-bit select), 1:4 (2-bit select), 1:8 (3-bit select), 1:16 (4-bit select). Example ICs: 74HC138 (3:8 decoder/DEMUX), 74HC139 (dual 2:4 decoder/DEMUX), 74HC154 (4:16 decoder/DEMUX). Supply voltage: 2–6 V (74HC). Propagation delay: 7–20 ns.
Where the Demultiplexer (DEMUX) symbol is used
- Time-division multiplexing (TDM) data links where a single serial channel carries interleaved data for multiple destinations, with the DEMUX separating them at the receiver.
- Microprocessor address bus decoding, directing a shared data bus to one of several memory or I/O chips.
- Multiplexed display driving, where a DEMUX routes LED segment data to each digit position in turn.
- Digital audio routing in mixing consoles and patchbay systems distributing one audio stream to selected output channels.
- FPGA I/O resource sharing, where a DEMUX inside the chip routes one signal to one of several I/O pins.
- Serial-to-parallel data conversion (combined with a shift register) in communication interfaces.
Example
In a 4-channel TDM data receiver, a DEMUX receives a time-multiplexed serial data stream on its In pin. A 2-bit counter driven by the TDM clock drives the Sel inputs, cycling through 00, 01, 10, 11. On each clock cycle, the DEMUX steers the incoming data bit to the appropriate output (O0–O3), reconstructing the four independent data channels from the time-shared serial link.
Key facts
- A Demultiplexer (DEMUX) routes one data input to one of 2^k output lines based on a k-bit binary selection input; only the selected output is active, all others are at their inactive logic state.
- The symbol pins in this implementation are: In (data input), Sel (selection input), O0, O1, O2 (outputs); a full 1:4 DEMUX would add O3 and a second selection bit.
- A decoder (such as the 74HC138) is functionally equivalent to a DEMUX when one of the enable inputs is used as the data signal; the decoder outputs are the DEMUX outputs.
- IEC 60617-12 and IEEE Std 91-1984 represent the DEMUX as a labelled block; IEEE 91 uses a trapezoid with the wide (multiple-output) side on the right to visually distinguish it from a MUX.
- The inverse of a DEMUX is a MUX (multiplexer), which selects one of N inputs and routes it to a single output.
- DEMUX circuits are fundamental in TDM (Time-Division Multiplexing) systems, where a single channel carries data from multiple sources interleaved in time, and the receiver DEMUX separates them.
- The 74HC139 IC contains two independent 1:4 DEMUX circuits (2-bit select, 4 active-low outputs) in a 16-pin package.
Frequently asked questions
What does the DEMUX symbol look like?
The DEMUX symbol is a labelled rectangle or trapezoid inscribed 'DEMUX'. On the left are the data input (In) and selection input(s) (Sel). On the right are multiple outputs (O0, O1, O2…). When drawn as a trapezoid, the wide side is on the output (multiple) side, indicating data expansion from one to many.
What does a demultiplexer do?
A demultiplexer (DEMUX) takes one data input and routes it to one selected output out of several, determined by the binary value on the selection inputs. All non-selected outputs remain at logic 0. It is the digital equivalent of a single-pole, multi-throw (SP-nT) switch.
What is the difference between a MUX and a DEMUX?
A multiplexer (MUX) selects one of N inputs and routes it to a single output—many to one. A demultiplexer (DEMUX) routes a single input to one of N outputs—one to many. They are inverse operations: a MUX compresses data channels and a DEMUX expands them, together forming the basis of TDM communication systems.
What are the pins on the DEMUX block symbol?
The DEMUX block shown on this symbol has five pins: In (the single data input), Sel (the binary selection input), and O0, O1, O2 (three of the output channels). A complete 1:4 DEMUX would have a second Sel bit and a fourth output (O3).
Which IC implements a 1:8 DEMUX?
The 74HC138 3:8 decoder IC functions as a 1:8 DEMUX when one of its three enable inputs is used as the data input. The three address pins (A0, A1, A2) serve as the 3-bit selection input, and the eight active-low outputs (Y0–Y7) are the DEMUX outputs.
What is the difference between a decoder and a DEMUX?
A binary decoder always activates exactly one output based on an address input, treating the address itself as the selection. A DEMUX also routes a data signal—not just an address—to the selected output. Operationally, a decoder with an enable input tied to a data line becomes a 1:N DEMUX; the two functions are structurally equivalent.
What standard defines the DEMUX schematic symbol?
The DEMUX is defined as a functional logic block in IEC 60617-12 and IEEE Std 91-1984 / ANSI Y32.14. IEEE 91 uses a distinctive trapezoid shape with the multiple-output side widened; IEC 60617-12 uses a labelled rectangle. Both are valid schematic representations.
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