NOR Gate Symbol

The NOR Gate schematic symbol. Standard-specific details are listed below where available.

Definition: The NOR Gate symbol represents a digital logic gate whose output is LOW (logic 0) whenever any one or more of its inputs are HIGH (logic 1), and HIGH (logic 0) only when all inputs are LOW, equivalent to an OR gate followed by an inverter, defined in IEC 60617-12 and ANSI Y32.2 / IEEE 315 as a curved-body shape (ANSI/IEEE distinctive) or a rectangular body with the ≥1 qualifier followed by a small inversion circle at the output.

Also known as: NOR logic gate, not-OR gate, universal gate NOR, NOR gate symbol.

What the NOR Gate symbol means

The NOR Gate symbol denotes a combinational logic element that performs the Boolean NOR operation: output Y = NOT(A OR B) = Ā·B̄ (De Morgan equivalent). The output is HIGH only when both inputs A and B are simultaneously LOW; any HIGH input drives the output LOW.

The NOR Gate is called a universal gate because any Boolean logic function — AND, OR, NOT, NAND, XOR, XNOR — can be constructed using only NOR gates. In digital circuit schematics the symbol conveys that the gate provides active-low logic and is often used in edge-triggered flip-flop designs, SR latches, and power-on reset circuits. The symbol has two input pins (A, B) and one output pin (Out).

How to identify the NOR Gate symbol

In the ANSI/IEEE distinctive-shape convention (ANSI Y32.2 / IEEE 315), the NOR Gate symbol is drawn as a curved 'shield' or 'bullet' body identical to the OR gate but with a small circle (bubble) added at the output pin — the bubble signifies inversion. In the IEC rectangular-body convention (IEC 60617-12), the NOR Gate is a rectangle with the qualifying symbol '≥1' (meaning one or more inputs must be HIGH for the OR function) and a small triangle or negation indicator at the output. The output bubble is the key visual feature that distinguishes the NOR gate from the OR gate.

Function and usage boundary

The NOR Gate produces a HIGH output only when all its inputs are simultaneously LOW. With any input HIGH, the OR function evaluates to HIGH, and the subsequent inversion produces a LOW output. This makes the NOR gate suitable for implementing active-low enable logic, SR latches (two cross-coupled NOR gates form a basic SR flip-flop), and combinational logic minimisation. NOR gates are also used in CMOS digital circuits because they complement the natural NAND-gate topology of CMOS technology.

Standards: IEC vs ANSI

IEC 60617	IEC 60617-12 defines the NOR gate symbol as a rectangle with the '≥1' qualifier function label and a negation indicator (small circle or triangle) at the output. The '≥1' denotes that the OR threshold function is one or more active inputs.
ANSI/IEEE 315	ANSI Y32.2-1975 (reaffirmed 1989) and IEEE 315-1975 define the NOR gate using the distinctive curved-body OR gate shape with a small inversion circle (bubble) at the output. This is the most widely recognised NOR gate symbol in North American textbooks and datasheets.
Key difference	The ANSI/IEEE NOR gate uses the organic curved OR body plus an output bubble. The IEC NOR gate uses a rectangle with '≥1' label and output negation indicator. Both convey the same Boolean function Y = NOT(A OR B) but are visually distinct.

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Logical terminals

Logical ID	Editor terminal name
a	A
b	B
out	Out

Where the NOR Gate symbol is used

SR latch construction: two cross-coupled NOR gates form a basic Set-Reset latch used in switch debouncing and memory cells
Active-low enable logic where the output must be LOW to enable a downstream device when any one of several disable signals is asserted
Power-on reset circuits where a NOR gate combines a delayed capacitor signal and a system-reset line into a single active-low reset pulse
Universal logic implementation in programmable logic devices (PLDs) where NOR planes implement any sum-of-products Boolean function
Clock gating circuits in digital ASICs where a NOR gate blocks the clock when any one of multiple disable inputs is active
Combinational hazard suppression where NOR gates add consensus terms to prevent output glitches in asynchronous circuits

Key facts

The NOR gate implements the Boolean function Y = NOT(A OR B), also written Ā·B̄ by De Morgan's theorem; the output is HIGH only when all inputs are simultaneously LOW.
NOR is a universal gate: any logic function (AND, OR, NOT, NAND, XOR, XNOR) can be constructed from NOR gates alone, making it useful in programmable logic arrays.
In the ANSI/IEEE distinctive-shape symbol, the NOR gate looks identical to the OR gate but adds a small inversion bubble at the output; the bubble is the sole visual differentiator.
In the IEC rectangular-body symbol (IEC 60617-12), the NOR gate is a rectangle with the '≥1' qualifier and a negation indicator at the output.
The two-input NOR truth table is: A=0,B=0 → Y=1; A=0,B=1 → Y=0; A=1,B=0 → Y=0; A=1,B=1 → Y=0.
Two cross-coupled NOR gates form an SR latch: the most basic bistable memory element in digital electronics, used in switch debouncing and edge-detection circuits.
The NOR gate symbol has two input pins (A and B) and one output pin (Out) in schematic representations.

Frequently asked questions

What does the NOR gate symbol mean in a circuit diagram?

The NOR gate symbol represents a digital logic gate that outputs HIGH only when all inputs are LOW. It performs the Boolean function Y = NOT(A OR B). It is defined in IEC 60617-12 (rectangular body, '≥1' qualifier, output negation indicator) and ANSI Y32.2 / IEEE 315 (curved OR body with output bubble).

What does the NOR gate symbol look like?

In ANSI/IEEE notation the NOR gate symbol is the curved 'shield' shape of an OR gate with a small circle (bubble) added at the output pin. In IEC notation it is a rectangle labelled '≥1' with a negation indicator at the output. The output bubble or negation marker is the key feature that distinguishes NOR from OR.

What is the difference between NOR and OR gate symbols?

The NOR gate symbol is identical to the OR gate symbol except for a small inversion bubble (circle) at the output in ANSI/IEEE notation, or a negation indicator in IEC notation. The bubble signifies output inversion: where OR outputs HIGH when any input is HIGH, NOR outputs LOW in that case.

What is the truth table of a two-input NOR gate?

The two-input NOR gate truth table is: inputs A=0, B=0 give output Y=1; A=0, B=1 give Y=0; A=1, B=0 give Y=0; A=1, B=1 give Y=0. The output is HIGH only when both inputs are simultaneously LOW — the inverse of the OR function.

Why is NOR called a universal gate?

NOR is called a universal gate because every Boolean logic function can be built using only NOR gates. A NOT gate is made by tying both inputs together; an OR gate adds a NOR-NOT inversion stage; an AND gate uses De Morgan's law applied to three NOR gates. This means an entire digital system can be implemented with only one type of gate.

What ICs implement the NOR gate?

Common NOR gate ICs include the 74HC02 (quad 2-input NOR, CMOS, 2–6 V), 74HC27 (triple 3-input NOR), and CD4001B (quad 2-input NOR, 4000-series CMOS, 3–15 V). For 3.3 V systems the 74LVC02A (2-input NOR) is commonly used.

How does a NOR gate form an SR latch?

Two NOR gates wired with their outputs cross-connected as inputs form an SR (Set-Reset) latch: a HIGH on the Set input forces Q HIGH and Q̄ LOW; a HIGH on the Reset input forces Q LOW. Both inputs LOW hold the previous state. Both inputs HIGH simultaneously is a forbidden state that drives both outputs LOW, violating the complementary Q/Q̄ requirement.

Related symbols

Physical breadboard, PCB, and panel mapping

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