XOR Gate Symbol
Definition: The XOR Gate symbol represents a digital logic gate whose output is logic HIGH (1) when its inputs differ (one is HIGH and the other is LOW) and logic LOW (0) when all inputs are the same, implementing the exclusive-OR Boolean function; it is defined in IEEE 315-1975 / ANSI Y32.2 as a distinctive-shape curved-body symbol with a curved indent on the input side and a pointed output, and in IEC 60617-12 as a rectangle with '=1' inside.
Also known as: exclusive OR gate, XOR, Ex-OR gate, exclusive disjunction gate, difference detector, half-adder gate.
What the XOR Gate symbol means
The XOR Gate symbol in a digital logic schematic means the circuit performs exclusive-OR logic: the output is HIGH only when the inputs are different. For a 2-input XOR gate, the truth table is: A=0,B=0 → Out=0; A=0,B=1 → Out=1; A=1,B=0 → Out=1; A=1,B=1 → Out=0. The Boolean expression is Out = A XOR B = A⊕B = (A AND NOT B) OR (NOT A AND B).
The XOR gate is one of the most important gates in digital design. It is the core building block of binary addition (the sum bit of a 1-bit half-adder is A⊕B), parity generation and checking, and data encryption. Unlike the OR gate (which is also HIGH when both inputs are HIGH), the XOR gate is HIGH only for exclusive conditions — exactly one input is HIGH. The schematic designator is typically U followed by a number and letter suffix (e.g., U4B for the B section of a dual XOR gate IC).
How to identify the XOR Gate symbol
The XOR Gate symbol in ANSI/IEEE 315 distinctive-shape notation is drawn as a curved body that resembles the OR gate shape — a curved shield with a pointed output end — but with an additional curved arc drawn across the flat (input) end of the symbol, creating a curved indent. This extra curved line on the input side is the visual distinguishing feature that differentiates XOR from OR. The input pins (A and B) enter from the left and the output pin (Out) exits from the right pointed end. In IEC 60617-12 notation the XOR gate is a rectangle with the qualifying symbol '=1' (meaning 'exactly one input is HIGH') written inside.
Function in a circuit
An XOR gate performs binary addition of two single bits, producing the sum bit without carry: 0+0=0, 0+1=1, 1+0=1, 1+1=0 (carry discarded). This is the fundamental operation of a 1-bit half-adder. XOR gates also detect differences: when used with a feedback path or reference, they act as inequality detectors. In CMOS technology (e.g., 74HC86), the XOR function is implemented using transmission gates and complementary circuits, achieving typical propagation delays of 5–15 ns. XOR is also used in parity trees (even-parity output is HIGH when the number of HIGH inputs is odd) and in LFSR (linear-feedback shift register) feedback taps.
Standards: IEC vs ANSI
| IEC 60617 | IEC 60617-12 defines the XOR gate symbol as a rectangle with the qualifying symbol '=1' inside, meaning the output is active when exactly one (and only one) input is HIGH. This rectangular convention applies to all binary logic elements in the IEC 60617 database. |
|---|---|
| ANSI/IEEE 315 | ANSI Y32.2 / IEEE 315-1975 defines the distinctive-shape XOR symbol: the curved OR-gate body with an additional curved arc across the input side. This symbol is universally used in North American digital electronics textbooks, datasheets, and schematics. |
| Key difference | The ANSI/IEEE symbol is the curved body with the input-side arc (visually distinct from OR), while the IEC symbol is a rectangle with '=1'. Both are correct; ANSI/IEEE is dominant in North America and most commercial EDA tools, while IEC rectangular symbols are standard in European and international digital-logic documentation. |
Terminals / pins
| Pin | Name |
|---|---|
| a | A |
| b | B |
| out | Out |
Typical values
Logic levels: LOW = 0 V, HIGH = 3.3 V or 5 V (CMOS); supply voltage: 2–6 V (74HC series), 1.65–5.5 V (74LVC series); propagation delay: 5–15 ns at 5 V (74HC86); output drive current: 4 mA source/sink (74HC), 8 mA (74HCT); common ICs: 74HC86 (quad 2-input XOR), 74LS86 (TTL quad XOR), CD4070 (CMOS quad XOR, 3–15 V); fan-out: 10 standard CMOS loads.
Where the XOR Gate symbol is used
- Binary adders and ALUs: the sum bit of each 1-bit adder stage is computed by XOR, forming the backbone of ripple-carry and carry-lookahead adders in CPUs
- Parity generators and checkers in serial data communication (UART framing, disk sector parity) and RAM error detection (odd/even parity bits)
- Linear-feedback shift registers (LFSRs) for pseudo-random number generation, CRC computation, and spread-spectrum communication
- Data encryption and scrambling: XOR mixing is the fundamental operation in stream ciphers, AES S-box operations, and one-time pad encryption
- Phase detectors in digital PLLs: an XOR phase detector compares two clock edges and produces a pulse-width-modulated output proportional to phase error
- Controlled inverters and bit-flip circuits: connecting one XOR input to a control line turns the gate into a programmable inverter (control=1 inverts the signal, control=0 passes it unchanged)
Example
In a 1-bit half-adder circuit, an XOR gate takes two input bits A and B: the XOR output gives the 1-bit sum (S = A⊕B) and an AND gate on the same inputs gives the carry-out (C = A·B). For A=1 and B=1, the XOR output is 0 (sum digit of binary 2) and the AND output is 1 (carry to the next bit position), correctly computing 1+1=10 in binary. This XOR-AND pair is the fundamental 1-bit building block of all digital adder architectures.
Key facts
- The XOR Gate symbol represents exclusive-OR logic: output is HIGH when inputs differ (A≠B) and LOW when inputs are the same (A=B); the Boolean expression is Out = A⊕B = (A AND NOT B) OR (NOT A AND B).
- The XOR gate truth table for 2 inputs: (0,0)→0, (0,1)→1, (1,0)→1, (1,1)→0 — output is 1 only when exactly one input is 1.
- The ANSI/IEEE 315 XOR symbol is identical to the OR gate body but has an additional curved arc drawn across the flat input side, visually distinguishing it from OR.
- The IEC 60617-12 XOR symbol is a rectangle with '=1' inside, indicating the gate is active when exactly one input is HIGH.
- The XOR gate is the key building block of binary adders: the sum bit of each 1-bit full-adder stage is computed by two cascaded XOR gates, making XOR central to all CPU arithmetic logic units.
- A 2-input XOR gate can be used as a programmable inverter: if one input is tied to a control signal, the gate passes the second input unchanged when control=0 and inverts it when control=1.
- Common XOR ICs include the 74HC86 (quad 2-input XOR, CMOS, 2–6 V), the 74LS86 (TTL), and the CD4070 (CMOS, 3–15 V supply for legacy logic levels).
- An XOR gate with n inputs is HIGH when the number of HIGH inputs is odd, making it the fundamental building block of parity tree circuits in digital communication and memory systems.
Frequently asked questions
What does the XOR gate symbol mean in a circuit diagram?
The XOR gate symbol means the circuit performs exclusive-OR logic: the output is HIGH when the two inputs are different (one HIGH, one LOW) and LOW when both inputs are the same. The Boolean expression is A⊕B. Unlike an OR gate, the XOR output is LOW when both inputs are HIGH.
What does the XOR gate symbol look like?
In ANSI/IEEE 315 notation, the XOR gate looks like an OR gate (a curved shield shape with a pointed output) but with an extra curved arc drawn across the flat input side of the body — this input-side arc is the visual differentiator from OR. In IEC 60617-12 notation, the XOR gate is a rectangle with '=1' written inside.
What is the difference between an OR gate and an XOR gate symbol?
The OR gate and XOR gate symbols look nearly identical in ANSI/IEEE notation, but the XOR symbol has an extra curved arc on the input (flat) side of the gate body. Functionally, OR outputs HIGH when any input is HIGH (including both HIGH), while XOR outputs HIGH only when inputs are different — XOR is LOW when both inputs are HIGH.
What is the IEC standard for the XOR gate symbol?
The XOR gate symbol is defined in IEC 60617-12 (binary logic elements) as a rectangle with the qualifying symbol '=1' inside, indicating that the output is active when exactly one input is HIGH. ANSI Y32.2 / IEEE 315-1975 defines the alternative distinctive curved-shape symbol with the extra input-side arc.
What is the XOR gate used for in digital circuits?
XOR gates are used for binary addition (the sum bit of each adder stage is A⊕B), parity generation and checking in communication and memory systems, linear-feedback shift registers (LFSRs) for CRC computation and pseudo-random number generation, data encryption (XOR mixing is fundamental to stream ciphers and AES), and programmable inverters in digital control logic.
What chips contain XOR gates?
Common XOR gate ICs include the 74HC86 (quad 2-input XOR, CMOS, 2–6 V supply), the 74LS86 (TTL quad XOR, 5 V supply), and the CD4070 (CMOS quad XOR, 3–15 V supply). In FPGA and ASIC designs, XOR is implemented directly in LUTs (look-up tables) with no external IC required.
How many pins does an XOR gate symbol have?
A 2-input XOR gate symbol has three pins: A (input), B (input), and Out (output). Multi-input XOR gates extend this with additional input pins; a 3-input XOR gate has pins A, B, C, and Out, where the output is HIGH when an odd number of inputs are HIGH.
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