XNOR Gate Symbol
Definition: The XNOR Gate symbol represents a digital logic gate whose output is logic HIGH (1) when all inputs are equal (both 0 or both 1) and logic LOW (0) when inputs differ, making it the logical complement of the XOR gate; it is defined in IEEE 315-1975 / ANSI Y32.2 and IEC 60617-12 as a distinctive-shape symbol consisting of a curved-body XOR gate outline followed by a small circle (bubble) at the output denoting inversion.
Also known as: exclusive NOR gate, equivalence gate, XNOR, coincidence gate, equality gate, Ex-NOR gate.
What the XNOR Gate symbol means
The XNOR Gate symbol in a logic diagram means the circuit performs exclusive-NOR logic: the output is HIGH only when both inputs have the same logic level (both LOW or both HIGH). For a 2-input XNOR, the truth table is: A=0,B=0 → Out=1; A=0,B=1 → Out=0; A=1,B=0 → Out=0; A=1,B=1 → Out=1. The XNOR gate is also called an 'equivalence gate' because its output is HIGH when the two inputs are equivalent (equal).
In digital circuit design, XNOR gates are used wherever equality or coincidence detection is needed: comparing two bits, building parity checkers, constructing comparators, and implementing linear-feedback shift registers (LFSRs). The XNOR gate is the complement of XOR: XNOR = NOT(XOR) = A XNOR B = A⊙B. Schematic designator is typically U or IC followed by a number (e.g., U3A).
How to identify the XNOR Gate symbol
The XNOR Gate symbol uses the distinctive-shape convention defined in IEEE 315 / ANSI Y32.2: it is drawn identically to the XOR gate body — a curved shield shape with a curved indent on the input side and a pointed output end — but with a small inversion bubble (filled circle) added at the output terminal. In IEC 60617-12 rectangular-logic-symbol convention, the XNOR gate is drawn as a rectangle with '=1' inside (same as XOR) followed by an inversion circle at the output, or alternatively as a rectangle with 'XNOR' or '⊙' label. Input pins are labelled A (top) and B (bottom) on the left, and the output pin is labelled Out on the right.
Function in a circuit
An XNOR gate detects logical equivalence between its inputs. For a 2-input XNOR, the Boolean expression is Out = NOT(A XOR B) = A⊙B = (A·B) + (Ā·B̄). The gate outputs HIGH when inputs are identical and LOW when they differ. In CMOS technology (e.g., 74HC266, 74HCT266), an XNOR gate is typically implemented as an XOR gate followed by an inverter, or as a 4-transistor complementary pass-gate circuit. Propagation delay in standard CMOS XNOR gates is typically 5–20 ns.
Standards: IEC vs ANSI
| IEC 60617 | IEC 60617-12 defines the rectangular logic symbol for the XNOR gate as a rectangle with the qualifying symbol '=1' inside (indicating equality/exclusive function) and an inversion marker at the output. The IEC 60617 database lists this under binary logic element symbols. |
|---|---|
| ANSI/IEEE 315 | ANSI Y32.2 / IEEE 315-1975 defines the distinctive-shape XNOR symbol: the curved XOR gate body (shield with curved input indent and pointed output) with a small bubble at the output pin. This is the symbol universally used in North American digital logic schematics and textbooks. |
| Key difference | The ANSI/IEEE symbol is the curved distinctive shape (XOR body + output bubble) while the IEC symbol is a rectangle with '=1' inside plus an output inversion marker. Both are in widespread use: ANSI/IEEE shape is dominant in the USA, IEC rectangle is standard in Europe and for VHDL/Verilog gate-level schematics in EDA tools. |
Terminals / pins
| Pin | Name |
|---|---|
| a | A |
| b | B |
| out | Out |
Typical values
Logic levels: LOW = 0 V (CMOS: 0–0.8 V), HIGH = 3.3 V or 5 V (CMOS: VDD-0.4 V to VDD); supply voltage: 2 V–6 V (74HC series), 1.65 V–5.5 V (74LVC series); propagation delay: 5–20 ns at 5 V (74HC266); output drive: 4 mA (74HC), 8 mA (74HCT); fan-out: 10 standard CMOS loads; ICs: 74HC266 (quad 2-input XNOR, open-drain), CD4077 (quad 2-input XNOR).
Where the XNOR Gate symbol is used
- Bit equality detectors and digital magnitude comparators (e.g., 74HC85) where each XNOR gate compares one bit of two multi-bit numbers
- Even-parity generators and checkers in serial communication (UART, SPI, I2C) and memory error-detection circuits
- Linear-feedback shift registers (LFSRs) for pseudo-random number generation and CRC computation
- Phase detectors in phase-locked loop (PLL) circuits detecting phase coincidence between two digital clock signals
- Encryption and cryptographic circuits where XOR/XNOR mixing is used for key scheduling and data diffusion
- Digital control logic where a signal must be enabled only when two control bits are equal (coincidence switching)
Example
In a 4-bit digital comparator circuit, four XNOR gates compare corresponding bits of two 4-bit binary numbers A[3:0] and B[3:0]: each XNOR gate takes one bit of A and one bit of B as inputs, and its output is HIGH only when those bits are equal. The four XNOR outputs feed an AND gate whose output goes HIGH only when all four bit pairs are equal, indicating A = B. This is the core equality detection logic inside ICs such as the 74HC85 comparator.
Key facts
- The XNOR Gate symbol represents a logic gate whose output is HIGH when both inputs are equal (both 0 or both 1) and LOW when they differ; its Boolean expression is Out = NOT(A XOR B) = A⊙B.
- The XNOR gate is called an equivalence gate or coincidence gate because it performs a logical equality test: XNOR output = 1 means A equals B.
- The ANSI/IEEE 315 symbol for XNOR is the curved XOR gate body (shield with curved-indent input side and pointed output) with a small inversion bubble at the output pin.
- The IEC 60617-12 symbol for XNOR is a rectangle with the qualifying symbol '=1' inside and an inversion marker at the output, following the IEC rectangular logic-element convention.
- A 2-input XNOR truth table: (0,0)→1, (0,1)→0, (1,0)→0, (1,1)→1 — the complement of the XOR gate's truth table.
- Common CMOS XNOR ICs include the 74HC266 (quad 2-input XNOR with open-drain outputs) and the CD4077 (quad 2-input XNOR with totem-pole outputs).
- XNOR gates have three pins in 2-input form: A (input), B (input), and Out (output); multi-input XNOR gates extend this but behave as a chain of 2-input XNOR operations.
- In FPGA and ASIC design, XNOR is synthesised from a LUT (look-up table) and is as fast as any other basic logic gate, with no performance penalty compared to NAND or NOR.
Frequently asked questions
What does the XNOR gate symbol mean in a logic diagram?
The XNOR gate symbol means the circuit performs exclusive-NOR logic: the output is HIGH when both inputs are the same logic level (both 0 or both 1) and LOW when inputs differ. It is the logical complement of the XOR gate and is also called an equivalence or coincidence gate.
What does the XNOR gate symbol look like?
In ANSI/IEEE 315 notation, the XNOR gate symbol looks like the XOR gate (a curved shield body with a curved indent on the input side and a pointed output) with a small inversion bubble (filled circle) added at the output pin. In IEC 60617-12 notation, it is a rectangle with '=1' inside and an inversion marker at the output.
What is the difference between an XOR gate and an XNOR gate symbol?
The XNOR gate symbol is identical to the XOR gate symbol except for a small inversion bubble at the output pin. Functionally, XNOR is the complement of XOR: XOR outputs HIGH when inputs differ, while XNOR outputs HIGH when inputs are the same. In IEC notation, XOR uses a rectangle with '=1' and XNOR uses the same rectangle with an additional output inversion marker.
What is the Boolean expression for the XNOR gate?
The Boolean expression for a 2-input XNOR gate is: Out = NOT(A XOR B) = A⊙B = (A AND B) OR (NOT A AND NOT B). The XNOR output is 1 when A equals B, which is why the XNOR gate is also called an equivalence gate.
What are the IEC and ANSI standards for the XNOR gate symbol?
The XNOR gate is defined in IEEE 315-1975 (ANSI Y32.2) using the distinctive curved-body shape with an output bubble, and in IEC 60617-12 using the rectangular logic-element convention with '=1' inside the rectangle and an output inversion marker. Both standards are widely used: ANSI/IEEE shape in North America, IEC rectangle in Europe.
What chips implement the XNOR gate?
Common XNOR gate ICs include the 74HC266 (quad 2-input XNOR with open-drain outputs, 2–6 V supply), the 74HCT266 (TTL-compatible inputs), and the CD4077 (CMOS quad 2-input XNOR, 3–15 V supply). In 74-series logic families, XNOR is less common as a standalone chip; XOR gates (74HC86) followed by an inverter are often used instead.
What is the XNOR gate used for in practical circuits?
The XNOR gate is used for bit-equality detection in digital comparators, parity checking in communication and memory systems, phase detection in PLLs, and LFSR-based pseudo-random number generators. Each XNOR gate compares two single-bit signals and produces a HIGH output only when they match, making it the fundamental building block of digital equality logic.
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